Commit c5796b71 authored Sep 03, 2015 by Imre Deak Committed by Daniel Vetter Sep 04, 2015

drm/i915: access the PP_CONTROL reg only pre GEN5



This register exists only pre GEN5, but atm we also access it on
VLV/BXT/CHV. Prevent accessing it on these latter platforms.

Signed-off-by: Imre Deak <imre.deak@intel.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>

parent 01101fa7

drivers/gpu/drm/i915/intel_lvds.c

+1 −1

Original line number	Diff line number	Diff line
		@@ -955,7 +955,7 @@ void intel_lvds_init(struct drm_device *dev)
		if (HAS_PCH_SPLIT(dev)) {
		I915_WRITE(PCH_PP_CONTROL,
		I915_READ(PCH_PP_CONTROL) \| PANEL_UNLOCK_REGS);
		} else {
		} else if (INTEL_INFO(dev_priv)->gen < 5) {
		I915_WRITE(PP_CONTROL,
		I915_READ(PP_CONTROL) \| PANEL_UNLOCK_REGS);
		}