Loading Documentation/devicetree/bindings/clock/sunxi-ccu.txt +4 −3 Original line number Diff line number Diff line Loading @@ -22,7 +22,8 @@ Required properties : - #clock-cells : must contain 1 - #reset-cells : must contain 1 For the PRCM CCUs on H3/A64, one more clock is needed: For the PRCM CCUs on H3/A64, two more clocks are needed: - "pll-periph": the SoC's peripheral PLL from the main CCU - "iosc": the SoC's internal frequency oscillator Example for generic CCU: Loading @@ -39,8 +40,8 @@ Example for PRCM CCU: r_ccu: clock@01f01400 { compatible = "allwinner,sun50i-a64-r-ccu"; reg = <0x01f01400 0x100>; clocks = <&osc24M>, <&osc32k>, <&iosc>; clock-names = "hosc", "losc", "iosc"; clocks = <&osc24M>, <&osc32k>, <&iosc>, <&ccu CLK_PLL_PERIPH0>; clock-names = "hosc", "losc", "iosc", "pll-periph"; #clock-cells = <1>; #reset-cells = <1>; }; Documentation/devicetree/bindings/gpio/gpio-mvebu.txt +3 −3 Original line number Diff line number Diff line Loading @@ -41,9 +41,9 @@ Required properties: Optional properties: In order to use the GPIO lines in PWM mode, some additional optional properties are required. Only Armada 370 and XP support these properties. properties are required. - compatible: Must contain "marvell,armada-370-xp-gpio" - compatible: Must contain "marvell,armada-370-gpio" - reg: an additional register set is needed, for the GPIO Blink Counter on/off registers. Loading Loading @@ -71,7 +71,7 @@ Example: }; gpio1: gpio@18140 { compatible = "marvell,armada-370-xp-gpio"; compatible = "marvell,armada-370-gpio"; reg = <0x18140 0x40>, <0x181c8 0x08>; reg-names = "gpio", "pwm"; ngpios = <17>; Loading Documentation/devicetree/bindings/mfd/stm32-timers.txt +1 −1 Original line number Diff line number Diff line Loading @@ -31,7 +31,7 @@ Example: compatible = "st,stm32-timers"; reg = <0x40010000 0x400>; clocks = <&rcc 0 160>; clock-names = "clk_int"; clock-names = "int"; pwm { compatible = "st,stm32-pwm"; Loading Documentation/devicetree/bindings/net/dsa/b53.txt +1 −1 Original line number Diff line number Diff line Loading @@ -34,7 +34,7 @@ Required properties: "brcm,bcm6328-switch" "brcm,bcm6368-switch" and the mandatory "brcm,bcm63xx-switch" See Documentation/devicetree/bindings/dsa/dsa.txt for a list of additional See Documentation/devicetree/bindings/net/dsa/dsa.txt for a list of additional required and optional properties. Examples: Loading Documentation/devicetree/bindings/net/smsc911x.txt +1 −0 Original line number Diff line number Diff line Loading @@ -27,6 +27,7 @@ Optional properties: of the device. On many systems this is wired high so the device goes out of reset at power-on, but if it is under program control, this optional GPIO can wake up in response to it. - vdd33a-supply, vddvario-supply : 3.3V analog and IO logic power supplies Examples: Loading Loading
Documentation/devicetree/bindings/clock/sunxi-ccu.txt +4 −3 Original line number Diff line number Diff line Loading @@ -22,7 +22,8 @@ Required properties : - #clock-cells : must contain 1 - #reset-cells : must contain 1 For the PRCM CCUs on H3/A64, one more clock is needed: For the PRCM CCUs on H3/A64, two more clocks are needed: - "pll-periph": the SoC's peripheral PLL from the main CCU - "iosc": the SoC's internal frequency oscillator Example for generic CCU: Loading @@ -39,8 +40,8 @@ Example for PRCM CCU: r_ccu: clock@01f01400 { compatible = "allwinner,sun50i-a64-r-ccu"; reg = <0x01f01400 0x100>; clocks = <&osc24M>, <&osc32k>, <&iosc>; clock-names = "hosc", "losc", "iosc"; clocks = <&osc24M>, <&osc32k>, <&iosc>, <&ccu CLK_PLL_PERIPH0>; clock-names = "hosc", "losc", "iosc", "pll-periph"; #clock-cells = <1>; #reset-cells = <1>; };
Documentation/devicetree/bindings/gpio/gpio-mvebu.txt +3 −3 Original line number Diff line number Diff line Loading @@ -41,9 +41,9 @@ Required properties: Optional properties: In order to use the GPIO lines in PWM mode, some additional optional properties are required. Only Armada 370 and XP support these properties. properties are required. - compatible: Must contain "marvell,armada-370-xp-gpio" - compatible: Must contain "marvell,armada-370-gpio" - reg: an additional register set is needed, for the GPIO Blink Counter on/off registers. Loading Loading @@ -71,7 +71,7 @@ Example: }; gpio1: gpio@18140 { compatible = "marvell,armada-370-xp-gpio"; compatible = "marvell,armada-370-gpio"; reg = <0x18140 0x40>, <0x181c8 0x08>; reg-names = "gpio", "pwm"; ngpios = <17>; Loading
Documentation/devicetree/bindings/mfd/stm32-timers.txt +1 −1 Original line number Diff line number Diff line Loading @@ -31,7 +31,7 @@ Example: compatible = "st,stm32-timers"; reg = <0x40010000 0x400>; clocks = <&rcc 0 160>; clock-names = "clk_int"; clock-names = "int"; pwm { compatible = "st,stm32-pwm"; Loading
Documentation/devicetree/bindings/net/dsa/b53.txt +1 −1 Original line number Diff line number Diff line Loading @@ -34,7 +34,7 @@ Required properties: "brcm,bcm6328-switch" "brcm,bcm6368-switch" and the mandatory "brcm,bcm63xx-switch" See Documentation/devicetree/bindings/dsa/dsa.txt for a list of additional See Documentation/devicetree/bindings/net/dsa/dsa.txt for a list of additional required and optional properties. Examples: Loading
Documentation/devicetree/bindings/net/smsc911x.txt +1 −0 Original line number Diff line number Diff line Loading @@ -27,6 +27,7 @@ Optional properties: of the device. On many systems this is wired high so the device goes out of reset at power-on, but if it is under program control, this optional GPIO can wake up in response to it. - vdd33a-supply, vddvario-supply : 3.3V analog and IO logic power supplies Examples: Loading