Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit be9a1b98 authored by Laurent Pinchart's avatar Laurent Pinchart Committed by Mauro Carvalho Chehab
Browse files

[media] omap3isp: Don't access ISP_CTRL directly in the statistics modules 



Use the existing omap3isp_subclk_enable() and omap3isp_subclk_disable()
functions instead.

Signed-off-by: default avatarLaurent Pinchart <laurent.pinchart@ideasonboard.com>
Acked-by: default avatarSakari Ailus <sakari.ailus@iki.fi>
Signed-off-by: default avatarMauro Carvalho Chehab <mchehab@redhat.com>
parent 2f65f467

drivers/media/video/omap3isp/isp.c

+3 −1
Original line number Diff line number Diff line
@@ -1281,7 +1281,9 @@ static void __isp_subclk_update(struct isp_device *isp) 
{

	u32 clk = 0;



	if (isp->subclk_resources & OMAP3_ISP_SUBCLK_H3A)

	/* AEWB and AF share the same clock. */

	if (isp->subclk_resources &

	    (OMAP3_ISP_SUBCLK_AEWB | OMAP3_ISP_SUBCLK_AF))

		clk |= ISPCTRL_H3A_CLK_EN;



	if (isp->subclk_resources & OMAP3_ISP_SUBCLK_HIST)

drivers/media/video/omap3isp/isp.h

+5 −4
Original line number Diff line number Diff line
@@ -90,10 +90,11 @@ enum isp_sbl_resource { 


enum isp_subclk_resource {

	OMAP3_ISP_SUBCLK_CCDC		= (1 << 0),

	OMAP3_ISP_SUBCLK_H3A		= (1 << 1),

	OMAP3_ISP_SUBCLK_HIST		= (1 << 2),

	OMAP3_ISP_SUBCLK_PREVIEW	= (1 << 3),

	OMAP3_ISP_SUBCLK_RESIZER	= (1 << 4),

	OMAP3_ISP_SUBCLK_AEWB		= (1 << 1),

	OMAP3_ISP_SUBCLK_AF		= (1 << 2),

	OMAP3_ISP_SUBCLK_HIST		= (1 << 3),

	OMAP3_ISP_SUBCLK_PREVIEW	= (1 << 4),

	OMAP3_ISP_SUBCLK_RESIZER	= (1 << 5),

};



/* ISP: OMAP 34xx ES 1.0 */

drivers/media/video/omap3isp/isph3a_aewb.c

+2 −8
Original line number Diff line number Diff line
@@ -93,17 +93,11 @@ static void h3a_aewb_enable(struct ispstat *aewb, int enable) 
	if (enable) {

		isp_reg_set(aewb->isp, OMAP3_ISP_IOMEM_H3A, ISPH3A_PCR,

			    ISPH3A_PCR_AEW_EN);

		/* This bit is already set if AF is enabled */

		if (aewb->isp->isp_af.state != ISPSTAT_ENABLED)

			isp_reg_set(aewb->isp, OMAP3_ISP_IOMEM_MAIN, ISP_CTRL,

				    ISPCTRL_H3A_CLK_EN);

		omap3isp_subclk_enable(aewb->isp, OMAP3_ISP_SUBCLK_AEWB);

	} else {

		isp_reg_clr(aewb->isp, OMAP3_ISP_IOMEM_H3A, ISPH3A_PCR,

			    ISPH3A_PCR_AEW_EN);

		/* This bit can't be cleared if AF is enabled */

		if (aewb->isp->isp_af.state != ISPSTAT_ENABLED)

			isp_reg_clr(aewb->isp, OMAP3_ISP_IOMEM_MAIN, ISP_CTRL,

				    ISPCTRL_H3A_CLK_EN);

		omap3isp_subclk_disable(aewb->isp, OMAP3_ISP_SUBCLK_AEWB);

	}

}

drivers/media/video/omap3isp/isph3a_af.c

+2 −8
Original line number Diff line number Diff line
@@ -143,17 +143,11 @@ static void h3a_af_enable(struct ispstat *af, int enable) 
	if (enable) {

		isp_reg_set(af->isp, OMAP3_ISP_IOMEM_H3A, ISPH3A_PCR,

			    ISPH3A_PCR_AF_EN);

		/* This bit is already set if AEWB is enabled */

		if (af->isp->isp_aewb.state != ISPSTAT_ENABLED)

			isp_reg_set(af->isp, OMAP3_ISP_IOMEM_MAIN, ISP_CTRL,

				    ISPCTRL_H3A_CLK_EN);

		omap3isp_subclk_enable(af->isp, OMAP3_ISP_SUBCLK_AF);

	} else {

		isp_reg_clr(af->isp, OMAP3_ISP_IOMEM_H3A, ISPH3A_PCR,

			    ISPH3A_PCR_AF_EN);

		/* This bit can't be cleared if AEWB is enabled */

		if (af->isp->isp_aewb.state != ISPSTAT_ENABLED)

			isp_reg_clr(af->isp, OMAP3_ISP_IOMEM_MAIN, ISP_CTRL,

				    ISPCTRL_H3A_CLK_EN);

		omap3isp_subclk_disable(af->isp, OMAP3_ISP_SUBCLK_AF);

	}

}

drivers/media/video/omap3isp/isphist.c

+2 −4
Original line number Diff line number Diff line
@@ -167,13 +167,11 @@ static void hist_enable(struct ispstat *hist, int enable) 
	if (enable) {

		isp_reg_set(hist->isp, OMAP3_ISP_IOMEM_HIST, ISPHIST_PCR,

			    ISPHIST_PCR_ENABLE);

		isp_reg_set(hist->isp, OMAP3_ISP_IOMEM_MAIN, ISP_CTRL,

			    ISPCTRL_HIST_CLK_EN);

		omap3isp_subclk_enable(hist->isp, OMAP3_ISP_SUBCLK_HIST);

	} else {

		isp_reg_clr(hist->isp, OMAP3_ISP_IOMEM_HIST, ISPHIST_PCR,

			    ISPHIST_PCR_ENABLE);

		isp_reg_clr(hist->isp, OMAP3_ISP_IOMEM_MAIN, ISP_CTRL,

			    ISPCTRL_HIST_CLK_EN);

		omap3isp_subclk_disable(hist->isp, OMAP3_ISP_SUBCLK_HIST);

	}

}