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Commit bd45fe53 authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge git://git.kernel.org/pub/scm/linux/kernel/git/benh/powerpc 

* git://git.kernel.org/pub/scm/linux/kernel/git/benh/powerpc: (25 commits)
  powerpc: Fix config dependency problem with MPIC_U3_HT_IRQS
  via-pmu: Add compat_pmu_ioctl
  powerpc: Wire up fanotify_init, fanotify_mark, prlimit64 syscalls
  powerpc/pci: Fix checking for child bridges in PCI code.
  powerpc: Fix typo in uImage target
  powerpc: Initialise paca->kstack before early_setup_secondary
  powerpc: Fix bogus it_blocksize in VIO iommu code
  powerpc: Inline ppc64_runlatch_off
  powerpc: Correct smt_enabled=X boot option for > 2 threads per core
  powerpc: Silence xics_migrate_irqs_away() during cpu offline
  powerpc: Silence __cpu_up() under normal operation
  powerpc: Re-enable preemption before cpu_die()
  powerpc/pci: Drop unnecessary null test
  powerpc/powermac: Drop unnecessary null test
  powerpc/powermac: Drop unnecessary of_node_put
  powerpc/kdump: Stop all other CPUs before running crash handlers
  powerpc/mm: Fix vsid_scrample typo
  powerpc: Use is_32bit_task() helper to test 32 bit binary
  powerpc: Export memstart_addr and kernstart_addr on ppc64
  powerpc: Make rwsem use "long" type
  ...
parents e1f1f073 314b389b

arch/powerpc/Makefile

+1 −1
Original line number Diff line number Diff line
@@ -164,7 +164,7 @@ drivers-$(CONFIG_OPROFILE) += arch/powerpc/oprofile/ 
all: zImage



# With make 3.82 we cannot mix normal and wildcard targets

BOOT_TARGETS1 := zImage zImage.initrd uImaged

BOOT_TARGETS1 := zImage zImage.initrd uImage

BOOT_TARGETS2 := zImage% dtbImage% treeImage.% cuImage.% simpleImage.%



PHONY += $(BOOT_TARGETS1) $(BOOT_TARGETS2)

arch/powerpc/boot/dts/canyonlands.dts

+8 −0
Original line number Diff line number Diff line
@@ -163,6 +163,14 @@ 
			interrupts = <0x1e 4>;

		};



		SATA0: sata@bffd1000 {

			compatible = "amcc,sata-460ex";

			reg = <4 0xbffd1000 0x800 4 0xbffd0800 0x400>;

			interrupt-parent = <&UIC3>;

			interrupts = <0x0 0x4       /* SATA */

				      0x5 0x4>;     /* AHBDMA */

		};



		POB0: opb {

			compatible = "ibm,opb-460ex", "ibm,opb";

			#address-cells = <1>;

arch/powerpc/include/asm/mmu-hash64.h

+1 −1
Original line number Diff line number Diff line
@@ -433,7 +433,7 @@ typedef struct { 
 * with.  However gcc is not clever enough to compute the

 * modulus (2^n-1) without a second multiply.

 */

#define vsid_scrample(protovsid, size) \

#define vsid_scramble(protovsid, size) \

	((((protovsid) * VSID_MULTIPLIER_##size) % VSID_MODULUS_##size))



#else /* 1 */

arch/powerpc/include/asm/reg.h

+8 −1
Original line number Diff line number Diff line
@@ -951,7 +951,14 @@ 
#ifdef CONFIG_PPC64



extern void ppc64_runlatch_on(void);

extern void ppc64_runlatch_off(void);

extern void __ppc64_runlatch_off(void);



#define ppc64_runlatch_off()					\

	do {							\

		if (cpu_has_feature(CPU_FTR_CTRL) &&		\

		    test_thread_flag(TIF_RUNLATCH))		\

			__ppc64_runlatch_off();			\

	} while (0)



extern unsigned long scom970_read(unsigned int address);

extern void scom970_write(unsigned int address, unsigned long value);

arch/powerpc/include/asm/rwsem.h

+37 −27
Original line number Diff line number Diff line
@@ -21,15 +21,20 @@ 
/*

 * the semaphore definition

 */

struct rw_semaphore {

	/* XXX this should be able to be an atomic_t  -- paulus */

	signed int		count;

#define RWSEM_UNLOCKED_VALUE		0x00000000

#define RWSEM_ACTIVE_BIAS		0x00000001

#define RWSEM_ACTIVE_MASK		0x0000ffff

#define RWSEM_WAITING_BIAS		(-0x00010000)

#ifdef CONFIG_PPC64

# define RWSEM_ACTIVE_MASK		0xffffffffL

#else

# define RWSEM_ACTIVE_MASK		0x0000ffffL

#endif



#define RWSEM_UNLOCKED_VALUE		0x00000000L

#define RWSEM_ACTIVE_BIAS		0x00000001L

#define RWSEM_WAITING_BIAS		(-RWSEM_ACTIVE_MASK-1)

#define RWSEM_ACTIVE_READ_BIAS		RWSEM_ACTIVE_BIAS

#define RWSEM_ACTIVE_WRITE_BIAS		(RWSEM_WAITING_BIAS + RWSEM_ACTIVE_BIAS)



struct rw_semaphore {

	long			count;

	spinlock_t		wait_lock;

	struct list_head	wait_list;

#ifdef CONFIG_DEBUG_LOCK_ALLOC
@@ -44,8 +49,12 @@ struct rw_semaphore { 
#endif



#define __RWSEM_INITIALIZER(name)				\

	{ RWSEM_UNLOCKED_VALUE, __SPIN_LOCK_UNLOCKED((name).wait_lock), \

	  LIST_HEAD_INIT((name).wait_list) __RWSEM_DEP_MAP_INIT(name) }

{								\

	RWSEM_UNLOCKED_VALUE,					\

	__SPIN_LOCK_UNLOCKED((name).wait_lock),			\

	LIST_HEAD_INIT((name).wait_list)			\

	__RWSEM_DEP_MAP_INIT(name)				\

}



#define DECLARE_RWSEM(name)		\

	struct rw_semaphore name = __RWSEM_INITIALIZER(name)
@@ -70,13 +79,13 @@ extern void __init_rwsem(struct rw_semaphore *sem, const char *name, 
 */

static inline void __down_read(struct rw_semaphore *sem)

{

	if (unlikely(atomic_inc_return((atomic_t *)(&sem->count)) <= 0))

	if (unlikely(atomic_long_inc_return((atomic_long_t *)&sem->count) <= 0))

		rwsem_down_read_failed(sem);

}



static inline int __down_read_trylock(struct rw_semaphore *sem)

{

	int tmp;

	long tmp;



	while ((tmp = sem->count) >= 0) {

		if (tmp == cmpxchg(&sem->count, tmp,
@@ -92,10 +101,10 @@ static inline int __down_read_trylock(struct rw_semaphore *sem) 
 */

static inline void __down_write_nested(struct rw_semaphore *sem, int subclass)

{

	int tmp;

	long tmp;



	tmp = atomic_add_return(RWSEM_ACTIVE_WRITE_BIAS,

				(atomic_t *)(&sem->count));

	tmp = atomic_long_add_return(RWSEM_ACTIVE_WRITE_BIAS,

				     (atomic_long_t *)&sem->count);

	if (unlikely(tmp != RWSEM_ACTIVE_WRITE_BIAS))

		rwsem_down_write_failed(sem);

}
@@ -107,7 +116,7 @@ static inline void __down_write(struct rw_semaphore *sem) 


static inline int __down_write_trylock(struct rw_semaphore *sem)

{

	int tmp;

	long tmp;



	tmp = cmpxchg(&sem->count, RWSEM_UNLOCKED_VALUE,

		      RWSEM_ACTIVE_WRITE_BIAS);
@@ -119,9 +128,9 @@ static inline int __down_write_trylock(struct rw_semaphore *sem) 
 */

static inline void __up_read(struct rw_semaphore *sem)

{

	int tmp;

	long tmp;



	tmp = atomic_dec_return((atomic_t *)(&sem->count));

	tmp = atomic_long_dec_return((atomic_long_t *)&sem->count);

	if (unlikely(tmp < -1 && (tmp & RWSEM_ACTIVE_MASK) == 0))

		rwsem_wake(sem);

}
@@ -131,17 +140,17 @@ static inline void __up_read(struct rw_semaphore *sem) 
 */

static inline void __up_write(struct rw_semaphore *sem)

{

	if (unlikely(atomic_sub_return(RWSEM_ACTIVE_WRITE_BIAS,

			      (atomic_t *)(&sem->count)) < 0))

	if (unlikely(atomic_long_sub_return(RWSEM_ACTIVE_WRITE_BIAS,

				 (atomic_long_t *)&sem->count) < 0))

		rwsem_wake(sem);

}



/*

 * implement atomic add functionality

 */

static inline void rwsem_atomic_add(int delta, struct rw_semaphore *sem)

static inline void rwsem_atomic_add(long delta, struct rw_semaphore *sem)

{

	atomic_add(delta, (atomic_t *)(&sem->count));

	atomic_long_add(delta, (atomic_long_t *)&sem->count);

}



/*
@@ -149,9 +158,10 @@ static inline void rwsem_atomic_add(int delta, struct rw_semaphore *sem) 
 */

static inline void __downgrade_write(struct rw_semaphore *sem)

{

	int tmp;

	long tmp;



	tmp = atomic_add_return(-RWSEM_WAITING_BIAS, (atomic_t *)(&sem->count));

	tmp = atomic_long_add_return(-RWSEM_WAITING_BIAS,

				     (atomic_long_t *)&sem->count);

	if (tmp < 0)

		rwsem_downgrade_wake(sem);

}
@@ -159,14 +169,14 @@ static inline void __downgrade_write(struct rw_semaphore *sem) 
/*

 * implement exchange and add functionality

 */

static inline int rwsem_atomic_update(int delta, struct rw_semaphore *sem)

static inline long rwsem_atomic_update(long delta, struct rw_semaphore *sem)

{

	return atomic_add_return(delta, (atomic_t *)(&sem->count));

	return atomic_long_add_return(delta, (atomic_long_t *)&sem->count);

}



static inline int rwsem_is_locked(struct rw_semaphore *sem)

{

	return (sem->count != 0);

	return sem->count != 0;

}



#endif	/* __KERNEL__ */