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Commit bd10838a authored by Or Gerlitz's avatar Or Gerlitz Committed by Saeed Mahameed
Browse files

net/mlx5: Fix some spelling mistakes 



Fixed few places where endianness was misspelled and
one spot whwere output was:

CHECK: 'endianess' may be misspelled - perhaps 'endianness'?
CHECK: 'ouput' may be misspelled - perhaps 'output'?

Signed-off-by: default avatarOr Gerlitz <ogerlitz@mellanox.com>
Signed-off-by: default avatarSaeed Mahameed <saeedm@mellanox.com>
parent 14160ea2

drivers/infiniband/hw/mlx5/main.c

+1 −1
Original line number Diff line number Diff line
@@ -439,7 +439,7 @@ static void get_atomic_caps(struct mlx5_ib_dev *dev, 
	u8 atomic_operations = MLX5_CAP_ATOMIC(dev->mdev, atomic_operations);

	u8 atomic_size_qp = MLX5_CAP_ATOMIC(dev->mdev, atomic_size_qp);

	u8 atomic_req_8B_endianness_mode =

		MLX5_CAP_ATOMIC(dev->mdev, atomic_req_8B_endianess_mode);

		MLX5_CAP_ATOMIC(dev->mdev, atomic_req_8B_endianness_mode);



	/* Check if HW supports 8 bytes standard atomic operations and capable

	 * of host endianness respond

drivers/net/ethernet/mellanox/mlx5/core/cmd.c

+1 −1
Original line number Diff line number Diff line
@@ -874,7 +874,7 @@ static const char *deliv_status_to_str(u8 status) 
	case MLX5_CMD_DELIVERY_STAT_IN_LENGTH_ERR:

		return "command input length error";

	case MLX5_CMD_DELIVERY_STAT_OUT_LENGTH_ERR:

		return "command ouput length error";

		return "command output length error";

	case MLX5_CMD_DELIVERY_STAT_RES_FLD_NOT_CLR_ERR:

		return "reserved fields not cleared";

	case MLX5_CMD_DELIVERY_STAT_CMD_DESCR_ERR:

drivers/net/ethernet/mellanox/mlx5/core/main.c

+5 −5
Original line number Diff line number Diff line
@@ -356,7 +356,7 @@ static void mlx5_disable_msix(struct mlx5_core_dev *dev) 
	kfree(priv->msix_arr);

}



struct mlx5_reg_host_endianess {

struct mlx5_reg_host_endianness {

	u8	he;

	u8      rsvd[15];

};
@@ -475,7 +475,7 @@ static int handle_hca_cap_atomic(struct mlx5_core_dev *dev) 


	req_endianness =

		MLX5_CAP_ATOMIC(dev,

				supported_atomic_req_8B_endianess_mode_1);

				supported_atomic_req_8B_endianness_mode_1);



	if (req_endianness != MLX5_ATOMIC_REQ_MODE_HOST_ENDIANNESS)

		return 0;
@@ -487,7 +487,7 @@ static int handle_hca_cap_atomic(struct mlx5_core_dev *dev) 
	set_hca_cap = MLX5_ADDR_OF(set_hca_cap_in, set_ctx, capability);



	/* Set requestor to host endianness */

	MLX5_SET(atomic_caps, set_hca_cap, atomic_req_8B_endianess_mode,

	MLX5_SET(atomic_caps, set_hca_cap, atomic_req_8B_endianness_mode,

		 MLX5_ATOMIC_REQ_MODE_HOST_ENDIANNESS);



	err = set_caps(dev, set_ctx, set_sz, MLX5_SET_HCA_CAP_OP_MOD_ATOMIC);
@@ -562,8 +562,8 @@ static int handle_hca_cap(struct mlx5_core_dev *dev) 


static int set_hca_ctrl(struct mlx5_core_dev *dev)

{

	struct mlx5_reg_host_endianess he_in;

	struct mlx5_reg_host_endianess he_out;

	struct mlx5_reg_host_endianness he_in;

	struct mlx5_reg_host_endianness he_out;

	int err;



	if (!mlx5_core_is_pf(dev))

include/linux/mlx5/mlx5_ifc.h

+2 −2
Original line number Diff line number Diff line
@@ -661,9 +661,9 @@ enum { 
struct mlx5_ifc_atomic_caps_bits {

	u8         reserved_at_0[0x40];



	u8         atomic_req_8B_endianess_mode[0x2];

	u8         atomic_req_8B_endianness_mode[0x2];

	u8         reserved_at_42[0x4];

	u8         supported_atomic_req_8B_endianess_mode_1[0x1];

	u8         supported_atomic_req_8B_endianness_mode_1[0x1];



	u8         reserved_at_47[0x19];