Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit bb546623 authored by Ander Conselvan de Oliveira's avatar Ander Conselvan de Oliveira Committed by Daniel Vetter
Browse files

drm/i915: Unify modeset and flip paths of intel_crtc_set_config()



Call intel_set_mode() uncondionally from intel_crtc_set_config(), since
the former function is now properly wired to ignore all the modesets if
the mode_changed and active_changed flags are false in crtc_state.

Signed-off-by: default avatarAnder Conselvan de Oliveira <ander.conselvan.de.oliveira@intel.com>
Reviewed-by: default avatarMaarten Lankhorst <maarten.lankhorst@linux.intel.com>
Signed-off-by: default avatarDaniel Vetter <daniel.vetter@ffwll.ch>
parent 41227c8c
Loading
Loading
Loading
Loading
+20 −17
Original line number Original line Diff line number Diff line
@@ -12850,12 +12850,21 @@ intel_modeset_stage_output_state(struct drm_device *dev,
	return 0;
	return 0;
}
}


static bool primary_plane_visible(struct drm_crtc *crtc)
{
	struct intel_plane_state *plane_state =
		to_intel_plane_state(crtc->primary->state);

	return plane_state->visible;
}

static int intel_crtc_set_config(struct drm_mode_set *set)
static int intel_crtc_set_config(struct drm_mode_set *set)
{
{
	struct drm_device *dev;
	struct drm_device *dev;
	struct drm_atomic_state *state = NULL;
	struct drm_atomic_state *state = NULL;
	struct intel_set_config *config;
	struct intel_set_config *config;
	struct intel_crtc_state *pipe_config;
	struct intel_crtc_state *pipe_config;
	bool primary_plane_was_visible;
	int ret;
	int ret;


	BUG_ON(!set);
	BUG_ON(!set);
@@ -12917,29 +12926,23 @@ static int intel_crtc_set_config(struct drm_mode_set *set)


	intel_update_pipe_size(to_intel_crtc(set->crtc));
	intel_update_pipe_size(to_intel_crtc(set->crtc));


	if (pipe_config->base.mode_changed) {
	primary_plane_was_visible = primary_plane_visible(set->crtc);

	ret = intel_set_mode_with_config(set->crtc, set->mode,
	ret = intel_set_mode_with_config(set->crtc, set->mode,
					 pipe_config);
					 pipe_config);
	} else if (pipe_config->base.planes_changed) {
		struct intel_crtc *intel_crtc = to_intel_crtc(set->crtc);
		struct drm_plane *primary = set->crtc->primary;
		struct intel_plane_state *plane_state =
				to_intel_plane_state(primary->state);
		bool was_visible = plane_state->visible;
		int vdisplay, hdisplay;


		drm_crtc_get_hv_timing(set->mode, &hdisplay, &vdisplay);
	if (ret == 0 &&
		ret = drm_plane_helper_update(primary, set->crtc, set->fb,
	    pipe_config->base.enable &&
					      0, 0, hdisplay, vdisplay,
	    pipe_config->base.planes_changed &&
					      set->x << 16, set->y << 16,
	    !needs_modeset(&pipe_config->base)) {
					      hdisplay << 16, vdisplay << 16);
		struct intel_crtc *intel_crtc = to_intel_crtc(set->crtc);


		/*
		/*
		 * We need to make sure the primary plane is re-enabled if it
		 * We need to make sure the primary plane is re-enabled if it
		 * has previously been turned off.
		 * has previously been turned off.
		 */
		 */
		plane_state = to_intel_plane_state(primary->state);
		if (ret == 0 && !primary_plane_was_visible &&
		if (ret == 0 && !was_visible && plane_state->visible) {
		    primary_plane_visible(set->crtc)) {
			WARN_ON(!intel_crtc->active);
			WARN_ON(!intel_crtc->active);
			intel_post_enable_primary(set->crtc);
			intel_post_enable_primary(set->crtc);
		}
		}