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Commit bb4dbefe authored by Linus Walleij's avatar Linus Walleij
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ARM: integrator: move CM base into device tree



This moves the core module (CM) control base into the device
tree. It is a simple memory range of 0x200 bytes. Move the
cm header down into the machine directory and unexport the
cm_control() symbol as no modules are using it.

Signed-off-by: default avatarLinus Walleij <linus.walleij@linaro.org>
parent 578fdfdf
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+19 −0
Original line number Diff line number Diff line
@@ -11,6 +11,20 @@ FPGA type interrupt controllers, see the versatile-fpga-irq binding doc.

Required nodes:

- core-module: the root node to the Integrator platforms must have
  a core-module with regs and the compatible string
  "arm,core-module-integrator"

  Required properties for the core module:
  - regs: the location and size of the core module registers, one
    range of 0x200 bytes.

- cpcon/syscon: the root node the Integrator/CP must have a /cpcon
  node pointing to the CP control registers, and the Integrator/AP
  must have a /syscon node pointing to the Integrator/AP system
  controller. The AP syscon node must include the logical module
  interrupts.

In the root node the Integrator/CP must have a /cpcon node pointing
to the CP control registers, and the Integrator/AP must have a
/syscon node pointing to the Integrator/AP system controller.
@@ -25,6 +39,11 @@ example:
	model = "ARM Integrator/AP";
	compatible = "arm,integrator-ap";

	core-module@10000000 {
		compatible = "arm,core-module-integrator";
		reg = <0x10000000 0x200>;
	};

	syscon {
		/* AP system controller registers */
		reg = <0x11000000 0x100>;
+5 −0
Original line number Diff line number Diff line
@@ -5,6 +5,11 @@
/include/ "skeleton.dtsi"

/ {
	core-module@10000000 {
		compatible = "arm,core-module-integrator";
		reg = <0x10000000 0x200>;
	};

	timer@13000000 {
		reg = <0x13000000 0x100>;
		interrupt-parent = <&pic>;
+3 −1
Original line number Diff line number Diff line
@@ -4,7 +4,9 @@
u32 cm_get(void);
void cm_control(u32, u32);

#define CM_CTRL	__io_address(INTEGRATOR_HDR_CTRL)
struct device_node;
void cm_init(void);
void cm_clear_irqs(void);

#define CM_CTRL_LED			(1 << 0)
#define CM_CTRL_nMBDET			(1 << 1)
+77 −43
Original line number Diff line number Diff line
@@ -22,18 +22,21 @@
#include <linux/amba/serial.h>
#include <linux/io.h>
#include <linux/stat.h>
#include <linux/of.h>
#include <linux/of_address.h>

#include <mach/hardware.h>
#include <mach/platform.h>
#include <mach/cm.h>

#include <asm/mach-types.h>
#include <asm/mach/time.h>
#include <asm/pgtable.h>

#include "cm.h"
#include "common.h"

static DEFINE_RAW_SPINLOCK(cm_lock);
static void __iomem *cm_base;

/**
 * cm_get - get the value from the CM_CTRL register
@@ -54,12 +57,80 @@ void cm_control(u32 mask, u32 set)
	u32 val;

	raw_spin_lock_irqsave(&cm_lock, flags);
	val = readl(CM_CTRL) & ~mask;
	writel(val | set, CM_CTRL);
	val = readl(cm_base + INTEGRATOR_HDR_CTRL_OFFSET) & ~mask;
	writel(val | set, cm_base + INTEGRATOR_HDR_CTRL_OFFSET);
	raw_spin_unlock_irqrestore(&cm_lock, flags);
}

EXPORT_SYMBOL(cm_control);
static const char *integrator_arch_str(u32 id)
{
	switch ((id >> 16) & 0xff) {
	case 0x00:
		return "ASB little-endian";
	case 0x01:
		return "AHB little-endian";
	case 0x03:
		return "AHB-Lite system bus, bi-endian";
	case 0x04:
		return "AHB";
	case 0x08:
		return "AHB system bus, ASB processor bus";
	default:
		return "Unknown";
	}
}

static const char *integrator_fpga_str(u32 id)
{
	switch ((id >> 12) & 0xf) {
	case 0x01:
		return "XC4062";
	case 0x02:
		return "XC4085";
	case 0x03:
		return "XVC600";
	case 0x04:
		return "EPM7256AE (Altera PLD)";
	default:
		return "Unknown";
	}
}

void cm_clear_irqs(void)
{
	/* disable core module IRQs */
	writel(0xffffffffU, cm_base + INTEGRATOR_HDR_IC_OFFSET +
		IRQ_ENABLE_CLEAR);
}

static const struct of_device_id cm_match[] = {
	{ .compatible = "arm,core-module-integrator"},
	{ },
};

void cm_init(void)
{
	struct device_node *cm = of_find_matching_node(NULL, cm_match);
	u32 val;

	if (!cm) {
		pr_crit("no core module node found in device tree\n");
		return;
	}
	cm_base = of_iomap(cm, 0);
	if (!cm_base) {
		pr_crit("could not remap core module\n");
		return;
	}
	cm_clear_irqs();
	val = readl(cm_base + INTEGRATOR_HDR_ID_OFFSET);
	pr_info("Detected ARM core module:\n");
	pr_info("    Manufacturer: %02x\n", (val >> 24));
	pr_info("    Architecture: %s\n", integrator_arch_str(val));
	pr_info("    FPGA: %s\n", integrator_fpga_str(val));
	pr_info("    Build: %02x\n", (val >> 4) & 0xFF);
	pr_info("    Rev: %c\n", ('A' + (val & 0x03)));
}

/*
 * We need to stop things allocating the low memory; ideally we need a
@@ -95,27 +166,7 @@ static ssize_t intcp_get_arch(struct device *dev,
			      struct device_attribute *attr,
			      char *buf)
{
	const char *arch;

	switch ((integrator_id >> 16) & 0xff) {
	case 0x00:
		arch = "ASB little-endian";
		break;
	case 0x01:
		arch = "AHB little-endian";
		break;
	case 0x03:
		arch = "AHB-Lite system bus, bi-endian";
		break;
	case 0x04:
		arch = "AHB";
		break;
	default:
		arch = "Unknown";
		break;
	}

	return sprintf(buf, "%s\n", arch);
	return sprintf(buf, "%s\n", integrator_arch_str(integrator_id));
}

static struct device_attribute intcp_arch_attr =
@@ -125,24 +176,7 @@ static ssize_t intcp_get_fpga(struct device *dev,
			      struct device_attribute *attr,
			      char *buf)
{
	const char *fpga;

	switch ((integrator_id >> 12) & 0xf) {
	case 0x01:
		fpga = "XC4062";
		break;
	case 0x02:
		fpga = "XC4085";
		break;
	case 0x04:
		fpga = "EPM7256AE (Altera PLD)";
		break;
	default:
		fpga = "Unknown";
		break;
	}

	return sprintf(buf, "%s\n", fpga);
	return sprintf(buf, "%s\n", integrator_fpga_str(integrator_id));
}

static struct device_attribute intcp_fpga_attr =
+3 −3
Original line number Diff line number Diff line
@@ -57,6 +57,7 @@
#include <asm/mach/map.h>
#include <asm/mach/time.h>

#include "cm.h"
#include "common.h"
#include "pci_v3.h"

@@ -145,7 +146,7 @@ static int irq_suspend(void)
static void irq_resume(void)
{
	/* disable all irq sources */
	writel(-1, VA_CMIC_BASE + IRQ_ENABLE_CLEAR);
	cm_clear_irqs();
	writel(-1, VA_IC_BASE + IRQ_ENABLE_CLEAR);
	writel(-1, VA_IC_BASE + FIQ_ENABLE_CLEAR);

@@ -447,8 +448,7 @@ static const struct of_device_id fpga_irq_of_match[] __initconst = {

static void __init ap_init_irq_of(void)
{
	/* disable core module IRQs */
	writel(0xffffffffU, VA_CMIC_BASE + IRQ_ENABLE_CLEAR);
	cm_init();
	of_irq_init(fpga_irq_of_match);
	integrator_clk_init(false);
}
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