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Commit ba89a3ec authored by Rex Zhu's avatar Rex Zhu Committed by Alex Deucher
Browse files

drm/amdgpu: add cgs interface to register pp handle 



Reviewed-by: default avatarAlex Deucher <alexander.deucher@amd.com>
Signed-off-by: default avatarRex Zhu <Rex.Zhu@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 6d07fe7b

drivers/gpu/drm/amd/amdgpu/amdgpu_cgs.c

+23 −0
Original line number Diff line number Diff line
@@ -42,6 +42,28 @@ struct amdgpu_cgs_device { 
	struct amdgpu_device *adev =					\

		((struct amdgpu_cgs_device *)cgs_device)->adev



static void *amdgpu_cgs_register_pp_handle(struct cgs_device *cgs_device,

			int (*call_back_func)(struct amd_pp_init *, void **))

{

	CGS_FUNC_ADEV;

	struct amd_pp_init pp_init;

	struct amd_powerplay *amd_pp;



	if (call_back_func == NULL)

		return NULL;



	amd_pp = &(adev->powerplay);

	pp_init.chip_family = adev->family;

	pp_init.chip_id = adev->asic_type;

	pp_init.pm_en = (amdgpu_dpm != 0 && !amdgpu_sriov_vf(adev)) ? true : false;

	pp_init.feature_mask = amdgpu_pp_feature_mask;

	pp_init.device = cgs_device;

	if (call_back_func(&pp_init, &(amd_pp->pp_handle)))

		return NULL;



	return adev->powerplay.pp_handle;

}



static int amdgpu_cgs_alloc_gpu_mem(struct cgs_device *cgs_device,

				    enum cgs_gpu_mem_type type,

				    uint64_t size, uint64_t align,
@@ -1179,6 +1201,7 @@ static const struct cgs_ops amdgpu_cgs_ops = { 
	.is_virtualization_enabled = amdgpu_cgs_is_virtualization_enabled,

	.enter_safe_mode = amdgpu_cgs_enter_safe_mode,

	.lock_grbm_idx = amdgpu_cgs_lock_grbm_idx,

	.register_pp_handle = amdgpu_cgs_register_pp_handle,

};



static const struct cgs_os_ops amdgpu_cgs_os_ops = {

drivers/gpu/drm/amd/include/cgs_common.h

+8 −0
Original line number Diff line number Diff line
@@ -423,6 +423,10 @@ typedef int (*cgs_enter_safe_mode)(struct cgs_device *cgs_device, bool en); 


typedef void (*cgs_lock_grbm_idx)(struct cgs_device *cgs_device, bool lock);



struct amd_pp_init;

typedef void* (*cgs_register_pp_handle)(struct cgs_device *cgs_device,

			int (*call_back_func)(struct amd_pp_init *, void **));



struct cgs_ops {

	/* memory management calls (similar to KFD interface) */

	cgs_alloc_gpu_mem_t alloc_gpu_mem;
@@ -459,6 +463,7 @@ struct cgs_ops { 
	cgs_is_virtualization_enabled_t is_virtualization_enabled;

	cgs_enter_safe_mode enter_safe_mode;

	cgs_lock_grbm_idx lock_grbm_idx;

	cgs_register_pp_handle register_pp_handle;

};



struct cgs_os_ops; /* To be define in OS-specific CGS header */
@@ -537,4 +542,7 @@ struct cgs_device 


#define cgs_lock_grbm_idx(cgs_device, lock) \

		CGS_CALL(lock_grbm_idx, cgs_device, lock)

#define cgs_register_pp_handle(cgs_device, call_back_func) \

		CGS_CALL(register_pp_handle, cgs_device, call_back_func)



#endif /* _CGS_COMMON_H */