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Commit b99d3659 authored by Bin Liu's avatar Bin Liu Committed by Greg Kroah-Hartman
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usb: musb: switch dev_dbg to tracepoints



Switch dev_dbg() to tracepoint debug musb_dbg().

Signed-off-by: default avatarBin Liu <b-liu@ti.com>
Signed-off-by: default avatarGreg Kroah-Hartman <gregkh@linuxfoundation.org>
parent f89252ad
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+24 −26
Original line number Diff line number Diff line
@@ -232,7 +232,7 @@ static void cppi_controller_stop(struct cppi *controller)
	musb_writel(tibase, DAVINCI_RXCPPI_INTCLR_REG,
			DAVINCI_DMA_ALL_CHANNELS_ENABLE);

	dev_dbg(musb->controller, "Tearing down RX and TX Channels\n");
	musb_dbg(musb, "Tearing down RX and TX Channels");
	for (i = 0; i < ARRAY_SIZE(controller->tx); i++) {
		/* FIXME restructure of txdma to use bds like rxdma */
		controller->tx[i].last_processed = NULL;
@@ -297,13 +297,13 @@ cppi_channel_allocate(struct dma_controller *c,
	 */
	if (transmit) {
		if (index >= ARRAY_SIZE(controller->tx)) {
			dev_dbg(musb->controller, "no %cX%d CPPI channel\n", 'T', index);
			musb_dbg(musb, "no %cX%d CPPI channel", 'T', index);
			return NULL;
		}
		cppi_ch = controller->tx + index;
	} else {
		if (index >= ARRAY_SIZE(controller->rx)) {
			dev_dbg(musb->controller, "no %cX%d CPPI channel\n", 'R', index);
			musb_dbg(musb, "no %cX%d CPPI channel", 'R', index);
			return NULL;
		}
		cppi_ch = controller->rx + index;
@@ -314,13 +314,13 @@ cppi_channel_allocate(struct dma_controller *c,
	 * with the other DMA engine too
	 */
	if (cppi_ch->hw_ep)
		dev_dbg(musb->controller, "re-allocating DMA%d %cX channel %p\n",
		musb_dbg(musb, "re-allocating DMA%d %cX channel %p",
				index, transmit ? 'T' : 'R', cppi_ch);
	cppi_ch->hw_ep = ep;
	cppi_ch->channel.status = MUSB_DMA_STATUS_FREE;
	cppi_ch->channel.max_len = 0x7fffffff;

	dev_dbg(musb->controller, "Allocate CPPI%d %cX\n", index, transmit ? 'T' : 'R');
	musb_dbg(musb, "Allocate CPPI%d %cX", index, transmit ? 'T' : 'R');
	return &cppi_ch->channel;
}

@@ -335,8 +335,8 @@ static void cppi_channel_release(struct dma_channel *channel)
	c = container_of(channel, struct cppi_channel, channel);
	tibase = c->controller->tibase;
	if (!c->hw_ep)
		dev_dbg(c->controller->musb->controller,
			"releasing idle DMA channel %p\n", c);
		musb_dbg(c->controller->musb,
			"releasing idle DMA channel %p", c);
	else if (!c->transmit)
		core_rxirq_enable(tibase, c->index + 1);

@@ -354,11 +354,10 @@ cppi_dump_rx(int level, struct cppi_channel *c, const char *tag)

	musb_ep_select(base, c->index + 1);

	dev_dbg(c->controller->musb->controller,
	musb_dbg(c->controller->musb,
		"RX DMA%d%s: %d left, csr %04x, "
		"%08x H%08x S%08x C%08x, "
		"B%08x L%08x %08x .. %08x"
		"\n",
		"B%08x L%08x %08x .. %08x",
		c->index, tag,
		musb_readl(c->controller->tibase,
			DAVINCI_RXCPPI_BUFCNT0_REG + 4 * c->index),
@@ -385,11 +384,10 @@ cppi_dump_tx(int level, struct cppi_channel *c, const char *tag)

	musb_ep_select(base, c->index + 1);

	dev_dbg(c->controller->musb->controller,
	musb_dbg(c->controller->musb,
		"TX DMA%d%s: csr %04x, "
		"H%08x S%08x C%08x %08x, "
		"F%08x L%08x .. %08x"
		"\n",
		"F%08x L%08x .. %08x",
		c->index, tag,
		musb_readw(c->hw_ep->regs, MUSB_TXCSR),

@@ -590,7 +588,7 @@ cppi_next_tx_segment(struct musb *musb, struct cppi_channel *tx)
		length = min(n_bds * maxpacket, length);
	}

	dev_dbg(musb->controller, "TX DMA%d, pktSz %d %s bds %d dma 0x%llx len %u\n",
	musb_dbg(musb, "TX DMA%d, pktSz %d %s bds %d dma 0x%llx len %u",
			tx->index,
			maxpacket,
			rndis ? "rndis" : "transparent",
@@ -647,7 +645,7 @@ cppi_next_tx_segment(struct musb *musb, struct cppi_channel *tx)
				bd->hw_options |= CPPI_ZERO_SET;
		}

		dev_dbg(musb->controller, "TXBD %p: nxt %08x buf %08x len %04x opt %08x\n",
		musb_dbg(musb, "TXBD %p: nxt %08x buf %08x len %04x opt %08x",
				bd, bd->hw_next, bd->hw_bufp,
				bd->hw_off_len, bd->hw_options);

@@ -813,8 +811,8 @@ cppi_next_rx_segment(struct musb *musb, struct cppi_channel *rx, int onepacket)

	length = min(n_bds * maxpacket, length);

	dev_dbg(musb->controller, "RX DMA%d seg, maxp %d %s bds %d (cnt %d) "
			"dma 0x%llx len %u %u/%u\n",
	musb_dbg(musb, "RX DMA%d seg, maxp %d %s bds %d (cnt %d) "
			"dma 0x%llx len %u %u/%u",
			rx->index, maxpacket,
			onepacket
				? (is_rndis ? "rndis" : "onepacket")
@@ -924,7 +922,7 @@ cppi_next_rx_segment(struct musb *musb, struct cppi_channel *rx, int onepacket)
			DAVINCI_RXCPPI_BUFCNT0_REG + (rx->index * 4))
			& 0xffff;
	if (i < (2 + n_bds)) {
		dev_dbg(musb->controller, "bufcnt%d underrun - %d (for %d)\n",
		musb_dbg(musb, "bufcnt%d underrun - %d (for %d)",
					rx->index, i, n_bds);
		musb_writel(tibase,
			DAVINCI_RXCPPI_BUFCNT0_REG + (rx->index * 4),
@@ -973,7 +971,7 @@ static int cppi_channel_program(struct dma_channel *ch,
		/* WARN_ON(1); */
		break;
	case MUSB_DMA_STATUS_UNKNOWN:
		dev_dbg(musb->controller, "%cX DMA%d not allocated!\n",
		musb_dbg(musb, "%cX DMA%d not allocated!",
				cppi_ch->transmit ? 'T' : 'R',
				cppi_ch->index);
		/* FALLTHROUGH */
@@ -1029,8 +1027,8 @@ static bool cppi_rx_scan(struct cppi *cppi, unsigned ch)
		if (!completed && (bd->hw_options & CPPI_OWN_SET))
			break;

		dev_dbg(musb->controller, "C/RXBD %llx: nxt %08x buf %08x "
			"off.len %08x opt.len %08x (%d)\n",
		musb_dbg(musb, "C/RXBD %llx: nxt %08x buf %08x "
			"off.len %08x opt.len %08x (%d)",
			(unsigned long long)bd->dma, bd->hw_next, bd->hw_bufp,
			bd->hw_off_len, bd->hw_options,
			rx->channel.actual_len);
@@ -1051,7 +1049,7 @@ static bool cppi_rx_scan(struct cppi *cppi, unsigned ch)
			 * CPPI ignores those BDs even though OWN is still set.
			 */
			completed = true;
			dev_dbg(musb->controller, "rx short %d/%d (%d)\n",
			musb_dbg(musb, "rx short %d/%d (%d)",
					len, bd->buflen,
					rx->channel.actual_len);
		}
@@ -1101,7 +1099,7 @@ static bool cppi_rx_scan(struct cppi *cppi, unsigned ch)
		musb_ep_select(cppi->mregs, rx->index + 1);
		csr = musb_readw(regs, MUSB_RXCSR);
		if (csr & MUSB_RXCSR_DMAENAB) {
			dev_dbg(musb->controller, "list%d %p/%p, last %llx%s, csr %04x\n",
			musb_dbg(musb, "list%d %p/%p, last %llx%s, csr %04x",
				rx->index,
				rx->head, rx->tail,
				rx->last_processed
@@ -1164,7 +1162,7 @@ irqreturn_t cppi_interrupt(int irq, void *dev_id)
		return IRQ_NONE;
	}

	dev_dbg(musb->controller, "CPPI IRQ Tx%x Rx%x\n", tx, rx);
	musb_dbg(musb, "CPPI IRQ Tx%x Rx%x", tx, rx);

	/* process TX channels */
	for (index = 0; tx; tx = tx >> 1, index++) {
@@ -1192,7 +1190,7 @@ irqreturn_t cppi_interrupt(int irq, void *dev_id)
		 * that needs to be acknowledged.
		 */
		if (NULL == bd) {
			dev_dbg(musb->controller, "null BD\n");
			musb_dbg(musb, "null BD");
			musb_writel(&tx_ram->tx_complete, 0, 0);
			continue;
		}
@@ -1207,7 +1205,7 @@ irqreturn_t cppi_interrupt(int irq, void *dev_id)
			if (bd->hw_options & CPPI_OWN_SET)
				break;

			dev_dbg(musb->controller, "C/TXBD %p n %x b %x off %x opt %x\n",
			musb_dbg(musb, "C/TXBD %p n %x b %x off %x opt %x",
					bd, bd->hw_next, bd->hw_bufp,
					bd->hw_off_len, bd->hw_options);

+31 −33
Original line number Diff line number Diff line
@@ -461,20 +461,21 @@ static void musb_otg_timer_func(unsigned long data)
	spin_lock_irqsave(&musb->lock, flags);
	switch (musb->xceiv->otg->state) {
	case OTG_STATE_B_WAIT_ACON:
		dev_dbg(musb->controller, "HNP: b_wait_acon timeout; back to b_peripheral\n");
		musb_dbg(musb,
			"HNP: b_wait_acon timeout; back to b_peripheral");
		musb_g_disconnect(musb);
		musb->xceiv->otg->state = OTG_STATE_B_PERIPHERAL;
		musb->is_active = 0;
		break;
	case OTG_STATE_A_SUSPEND:
	case OTG_STATE_A_WAIT_BCON:
		dev_dbg(musb->controller, "HNP: %s timeout\n",
		musb_dbg(musb, "HNP: %s timeout",
			usb_otg_state_string(musb->xceiv->otg->state));
		musb_platform_set_vbus(musb, 0);
		musb->xceiv->otg->state = OTG_STATE_A_WAIT_VFALL;
		break;
	default:
		dev_dbg(musb->controller, "HNP: Unhandled mode %s\n",
		musb_dbg(musb, "HNP: Unhandled mode %s",
			usb_otg_state_string(musb->xceiv->otg->state));
	}
	spin_unlock_irqrestore(&musb->lock, flags);
@@ -489,17 +490,17 @@ void musb_hnp_stop(struct musb *musb)
	void __iomem	*mbase = musb->mregs;
	u8	reg;

	dev_dbg(musb->controller, "HNP: stop from %s\n",
	musb_dbg(musb, "HNP: stop from %s",
			usb_otg_state_string(musb->xceiv->otg->state));

	switch (musb->xceiv->otg->state) {
	case OTG_STATE_A_PERIPHERAL:
		musb_g_disconnect(musb);
		dev_dbg(musb->controller, "HNP: back to %s\n",
		musb_dbg(musb, "HNP: back to %s",
			usb_otg_state_string(musb->xceiv->otg->state));
		break;
	case OTG_STATE_B_HOST:
		dev_dbg(musb->controller, "HNP: Disabling HR\n");
		musb_dbg(musb, "HNP: Disabling HR");
		if (hcd)
			hcd->self.is_b_host = 0;
		musb->xceiv->otg->state = OTG_STATE_B_PERIPHERAL;
@@ -510,7 +511,7 @@ void musb_hnp_stop(struct musb *musb)
		/* REVISIT: Start SESSION_REQUEST here? */
		break;
	default:
		dev_dbg(musb->controller, "HNP: Stopping in unknown state %s\n",
		musb_dbg(musb, "HNP: Stopping in unknown state %s",
			usb_otg_state_string(musb->xceiv->otg->state));
	}

@@ -541,8 +542,7 @@ static irqreturn_t musb_stage0_irq(struct musb *musb, u8 int_usb,
{
	irqreturn_t handled = IRQ_NONE;

	dev_dbg(musb->controller, "<== DevCtl=%02x, int_usb=0x%x\n", devctl,
		int_usb);
	musb_dbg(musb, "<== DevCtl=%02x, int_usb=0x%x", devctl, int_usb);

	/* in host mode, the peripheral may issue remote wakeup.
	 * in peripheral mode, the host may resume the link.
@@ -550,7 +550,7 @@ static irqreturn_t musb_stage0_irq(struct musb *musb, u8 int_usb,
	 */
	if (int_usb & MUSB_INTR_RESUME) {
		handled = IRQ_HANDLED;
		dev_dbg(musb->controller, "RESUME (%s)\n",
		musb_dbg(musb, "RESUME (%s)",
				usb_otg_state_string(musb->xceiv->otg->state));

		if (devctl & MUSB_DEVCTL_HM) {
@@ -619,11 +619,11 @@ static irqreturn_t musb_stage0_irq(struct musb *musb, u8 int_usb,

		if ((devctl & MUSB_DEVCTL_VBUS) == MUSB_DEVCTL_VBUS
				&& (devctl & MUSB_DEVCTL_BDEVICE)) {
			dev_dbg(musb->controller, "SessReq while on B state\n");
			musb_dbg(musb, "SessReq while on B state");
			return IRQ_HANDLED;
		}

		dev_dbg(musb->controller, "SESSION_REQUEST (%s)\n",
		musb_dbg(musb, "SESSION_REQUEST (%s)",
			usb_otg_state_string(musb->xceiv->otg->state));

		/* IRQ arrives from ID pin sense or (later, if VBUS power
@@ -714,7 +714,7 @@ static irqreturn_t musb_stage0_irq(struct musb *musb, u8 int_usb,
	}

	if (int_usb & MUSB_INTR_SUSPEND) {
		dev_dbg(musb->controller, "SUSPEND (%s) devctl %02x\n",
		musb_dbg(musb, "SUSPEND (%s) devctl %02x",
			usb_otg_state_string(musb->xceiv->otg->state), devctl);
		handled = IRQ_HANDLED;

@@ -743,7 +743,7 @@ static irqreturn_t musb_stage0_irq(struct musb *musb, u8 int_usb,
			musb->is_active = musb->g.b_hnp_enable;
			if (musb->is_active) {
				musb->xceiv->otg->state = OTG_STATE_B_WAIT_ACON;
				dev_dbg(musb->controller, "HNP: Setting timer for b_ase0_brst\n");
				musb_dbg(musb, "HNP: Setting timer for b_ase0_brst");
				mod_timer(&musb->otg_timer, jiffies
					+ msecs_to_jiffies(
							OTG_TIME_B_ASE0_BRST));
@@ -760,7 +760,7 @@ static irqreturn_t musb_stage0_irq(struct musb *musb, u8 int_usb,
			break;
		case OTG_STATE_B_HOST:
			/* Transition to B_PERIPHERAL, see 6.8.2.6 p 44 */
			dev_dbg(musb->controller, "REVISIT: SUSPEND as B_HOST\n");
			musb_dbg(musb, "REVISIT: SUSPEND as B_HOST");
			break;
		default:
			/* "should not happen" */
@@ -797,14 +797,14 @@ static irqreturn_t musb_stage0_irq(struct musb *musb, u8 int_usb,
		switch (musb->xceiv->otg->state) {
		case OTG_STATE_B_PERIPHERAL:
			if (int_usb & MUSB_INTR_SUSPEND) {
				dev_dbg(musb->controller, "HNP: SUSPEND+CONNECT, now b_host\n");
				musb_dbg(musb, "HNP: SUSPEND+CONNECT, now b_host");
				int_usb &= ~MUSB_INTR_SUSPEND;
				goto b_host;
			} else
				dev_dbg(musb->controller, "CONNECT as b_peripheral???\n");
				musb_dbg(musb, "CONNECT as b_peripheral???");
			break;
		case OTG_STATE_B_WAIT_ACON:
			dev_dbg(musb->controller, "HNP: CONNECT, now b_host\n");
			musb_dbg(musb, "HNP: CONNECT, now b_host");
b_host:
			musb->xceiv->otg->state = OTG_STATE_B_HOST;
			if (musb->hcd)
@@ -823,12 +823,12 @@ static irqreturn_t musb_stage0_irq(struct musb *musb, u8 int_usb,

		musb_host_poke_root_hub(musb);

		dev_dbg(musb->controller, "CONNECT (%s) devctl %02x\n",
		musb_dbg(musb, "CONNECT (%s) devctl %02x",
				usb_otg_state_string(musb->xceiv->otg->state), devctl);
	}

	if (int_usb & MUSB_INTR_DISCONNECT) {
		dev_dbg(musb->controller, "DISCONNECT (%s) as %s, devctl %02x\n",
		musb_dbg(musb, "DISCONNECT (%s) as %s, devctl %02x",
				usb_otg_state_string(musb->xceiv->otg->state),
				MUSB_MODE(musb), devctl);
		handled = IRQ_HANDLED;
@@ -891,7 +891,7 @@ static irqreturn_t musb_stage0_irq(struct musb *musb, u8 int_usb,
			if (is_host_active(musb))
				musb_recover_from_babble(musb);
		} else {
			dev_dbg(musb->controller, "BUS RESET as %s\n",
			musb_dbg(musb, "BUS RESET as %s",
				usb_otg_state_string(musb->xceiv->otg->state));
			switch (musb->xceiv->otg->state) {
			case OTG_STATE_A_SUSPEND:
@@ -899,7 +899,7 @@ static irqreturn_t musb_stage0_irq(struct musb *musb, u8 int_usb,
				/* FALLTHROUGH */
			case OTG_STATE_A_WAIT_BCON:	/* OPT TD.4.7-900ms */
				/* never use invalid T(a_wait_bcon) */
				dev_dbg(musb->controller, "HNP: in %s, %d msec timeout\n",
				musb_dbg(musb, "HNP: in %s, %d msec timeout",
					usb_otg_state_string(musb->xceiv->otg->state),
					TA_WAIT_BCON(musb));
				mod_timer(&musb->otg_timer, jiffies
@@ -910,7 +910,7 @@ static irqreturn_t musb_stage0_irq(struct musb *musb, u8 int_usb,
				musb_g_reset(musb);
				break;
			case OTG_STATE_B_WAIT_ACON:
				dev_dbg(musb->controller, "HNP: RESET (%s), to b_peripheral\n",
				musb_dbg(musb, "HNP: RESET (%s), to b_peripheral",
					usb_otg_state_string(musb->xceiv->otg->state));
				musb->xceiv->otg->state = OTG_STATE_B_PERIPHERAL;
				musb_g_reset(musb);
@@ -922,7 +922,7 @@ static irqreturn_t musb_stage0_irq(struct musb *musb, u8 int_usb,
				musb_g_reset(musb);
				break;
			default:
				dev_dbg(musb->controller, "Unhandled BUS RESET as %s\n",
				musb_dbg(musb, "Unhandled BUS RESET as %s",
					usb_otg_state_string(musb->xceiv->otg->state));
			}
		}
@@ -1030,7 +1030,7 @@ void musb_start(struct musb *musb)
	u8              devctl = musb_readb(regs, MUSB_DEVCTL);
	u8		power;

	dev_dbg(musb->controller, "<== devctl %02x\n", devctl);
	musb_dbg(musb, "<== devctl %02x", devctl);

	musb_enable_interrupts(musb);
	musb_writeb(regs, MUSB_TESTMODE, 0);
@@ -1078,7 +1078,7 @@ void musb_stop(struct musb *musb)
	/* stop IRQs, timers, ... */
	musb_platform_disable(musb);
	musb_generic_disable(musb);
	dev_dbg(musb->controller, "HDRC disabled\n");
	musb_dbg(musb, "HDRC disabled");

	/* FIXME
	 *  - mark host and/or peripheral drivers unusable/inactive
@@ -1391,7 +1391,7 @@ static int ep_config_from_hw(struct musb *musb)
	void __iomem *mbase = musb->mregs;
	int ret = 0;

	dev_dbg(musb->controller, "<== static silicon ep config\n");
	musb_dbg(musb, "<== static silicon ep config");

	/* FIXME pick up ep0 maxpacket size */

@@ -1532,8 +1532,7 @@ static int musb_core_init(u16 musb_type, struct musb *musb)
		hw_ep->tx_reinit = 1;

		if (hw_ep->max_packet_sz_tx) {
			dev_dbg(musb->controller,
				"%s: hw_ep %d%s, %smax %d\n",
			musb_dbg(musb, "%s: hw_ep %d%s, %smax %d",
				musb_driver_name, i,
				hw_ep->is_shared_fifo ? "shared" : "tx",
				hw_ep->tx_double_buffered
@@ -1541,8 +1540,7 @@ static int musb_core_init(u16 musb_type, struct musb *musb)
				hw_ep->max_packet_sz_tx);
		}
		if (hw_ep->max_packet_sz_rx && !hw_ep->is_shared_fifo) {
			dev_dbg(musb->controller,
				"%s: hw_ep %d%s, %smax %d\n",
			musb_dbg(musb, "%s: hw_ep %d%s, %smax %d",
				musb_driver_name, i,
				"rx",
				hw_ep->rx_double_buffered
@@ -1550,7 +1548,7 @@ static int musb_core_init(u16 musb_type, struct musb *musb)
				hw_ep->max_packet_sz_rx);
		}
		if (!(hw_ep->max_packet_sz_tx || hw_ep->max_packet_sz_rx))
			dev_dbg(musb->controller, "hw_ep %d not configured\n", i);
			musb_dbg(musb, "hw_ep %d not configured", i);
	}

	return 0;
@@ -1976,7 +1974,7 @@ musb_init_controller(struct device *dev, int nIrq, void __iomem *ctrl)
	 * Fail when the board needs a feature that's not enabled.
	 */
	if (!plat) {
		dev_dbg(dev, "no platform_data?\n");
		dev_err(dev, "no platform_data?\n");
		status = -ENODEV;
		goto fail0;
	}
+6 −6
Original line number Diff line number Diff line
@@ -96,8 +96,8 @@ static void update_rx_toggle(struct cppi41_dma_channel *cppi41_channel)
	if (!toggle && toggle == cppi41_channel->usb_toggle) {
		csr |= MUSB_RXCSR_H_DATATOGGLE | MUSB_RXCSR_H_WR_DATATOGGLE;
		musb_writew(cppi41_channel->hw_ep->regs, MUSB_RXCSR, csr);
		dev_dbg(cppi41_channel->controller->musb->controller,
				"Restoring DATA1 toggle.\n");
		musb_dbg(cppi41_channel->controller->musb,
				"Restoring DATA1 toggle.");
	}

	cppi41_channel->usb_toggle = toggle;
@@ -240,7 +240,7 @@ static void cppi41_dma_callback(void *private_data)
	transferred = cppi41_channel->prog_len - txstate.residue;
	cppi41_channel->transferred += transferred;

	dev_dbg(musb->controller, "DMA transfer done on hw_ep=%d bytes=%d/%d\n",
	musb_dbg(musb, "DMA transfer done on hw_ep=%d bytes=%d/%d",
		hw_ep->epnum, cppi41_channel->transferred,
		cppi41_channel->total_len);

@@ -374,8 +374,8 @@ static bool cppi41_configure_channel(struct dma_channel *channel,
	struct musb *musb = cppi41_channel->controller->musb;
	unsigned use_gen_rndis = 0;

	dev_dbg(musb->controller,
		"configure ep%d/%x packet_sz=%d, mode=%d, dma_addr=0x%llx, len=%d is_tx=%d\n",
	musb_dbg(musb,
		"configure ep%d/%x packet_sz=%d, mode=%d, dma_addr=0x%llx, len=%d is_tx=%d",
		cppi41_channel->port_num, RNDIS_REG(cppi41_channel->port_num),
		packet_sz, mode, (unsigned long long) dma_addr,
		len, cppi41_channel->is_tx);
@@ -537,7 +537,7 @@ static int cppi41_dma_channel_abort(struct dma_channel *channel)
	u16 csr;

	is_tx = cppi41_channel->is_tx;
	dev_dbg(musb->controller, "abort channel=%d, is_tx=%d\n",
	musb_dbg(musb, "abort channel=%d, is_tx=%d",
			cppi41_channel->port_num, is_tx);

	if (cppi41_channel->channel.status == MUSB_DMA_STATUS_FREE)
+47 −50

File changed.

Preview size limit exceeded, changes collapsed.

+11 −11
Original line number Diff line number Diff line
@@ -206,7 +206,7 @@ static inline void musb_try_b_hnp_enable(struct musb *musb)
	void __iomem	*mbase = musb->mregs;
	u8		devctl;

	dev_dbg(musb->controller, "HNP: Setting HR\n");
	musb_dbg(musb, "HNP: Setting HR");
	devctl = musb_readb(mbase, MUSB_DEVCTL);
	musb_writeb(mbase, MUSB_DEVCTL, devctl | MUSB_DEVCTL_HR);
}
@@ -303,7 +303,7 @@ __acquires(musb->lock)
				/* Maybe start the first request in the queue */
				request = next_request(musb_ep);
				if (!musb_ep->busy && request) {
					dev_dbg(musb->controller, "restarting the request\n");
					musb_dbg(musb, "restarting the request");
					musb_ep_restart(musb, request);
				}

@@ -550,7 +550,7 @@ static void ep0_txstate(struct musb *musb)

	if (!req) {
		/* WARN_ON(1); */
		dev_dbg(musb->controller, "odd; csr0 %04x\n", musb_readw(regs, MUSB_CSR0));
		musb_dbg(musb, "odd; csr0 %04x", musb_readw(regs, MUSB_CSR0));
		return;
	}

@@ -607,7 +607,7 @@ musb_read_setup(struct musb *musb, struct usb_ctrlrequest *req)
	/* NOTE:  earlier 2.6 versions changed setup packets to host
	 * order, but now USB packets always stay in USB byte order.
	 */
	dev_dbg(musb->controller, "SETUP req%02x.%02x v%04x i%04x l%d\n",
	musb_dbg(musb, "SETUP req%02x.%02x v%04x i%04x l%d",
		req->bRequestType,
		req->bRequest,
		le16_to_cpu(req->wValue),
@@ -675,7 +675,7 @@ irqreturn_t musb_g_ep0_irq(struct musb *musb)
	csr = musb_readw(regs, MUSB_CSR0);
	len = musb_readb(regs, MUSB_COUNT0);

	dev_dbg(musb->controller, "csr %04x, count %d, ep0stage %s\n",
	musb_dbg(musb, "csr %04x, count %d, ep0stage %s",
			csr, len, decode_ep0stage(musb->ep0_state));

	if (csr & MUSB_CSR0_P_DATAEND) {
@@ -752,7 +752,7 @@ irqreturn_t musb_g_ep0_irq(struct musb *musb)

		/* enter test mode if needed (exit by reset) */
		else if (musb->test_mode) {
			dev_dbg(musb->controller, "entering TESTMODE\n");
			musb_dbg(musb, "entering TESTMODE");

			if (MUSB_TEST_PACKET == musb->test_mode_nr)
				musb_load_testpacket(musb);
@@ -864,7 +864,7 @@ irqreturn_t musb_g_ep0_irq(struct musb *musb)
				break;
			}

			dev_dbg(musb->controller, "handled %d, csr %04x, ep0stage %s\n",
			musb_dbg(musb, "handled %d, csr %04x, ep0stage %s",
				handled, csr,
				decode_ep0stage(musb->ep0_state));

@@ -881,7 +881,7 @@ irqreturn_t musb_g_ep0_irq(struct musb *musb)
			if (handled < 0) {
				musb_ep_select(mbase, 0);
stall:
				dev_dbg(musb->controller, "stall (%d)\n", handled);
				musb_dbg(musb, "stall (%d)", handled);
				musb->ackpend |= MUSB_CSR0_P_SENDSTALL;
				musb->ep0_state = MUSB_EP0_STAGE_IDLE;
finish:
@@ -961,7 +961,7 @@ musb_g_ep0_queue(struct usb_ep *e, struct usb_request *r, gfp_t gfp_flags)
		status = 0;
		break;
	default:
		dev_dbg(musb->controller, "ep0 request queued in state %d\n",
		musb_dbg(musb, "ep0 request queued in state %d",
				musb->ep0_state);
		status = -EINVAL;
		goto cleanup;
@@ -970,7 +970,7 @@ musb_g_ep0_queue(struct usb_ep *e, struct usb_request *r, gfp_t gfp_flags)
	/* add request to the list */
	list_add_tail(&req->list, &ep->req_list);

	dev_dbg(musb->controller, "queue to %s (%s), length=%d\n",
	musb_dbg(musb, "queue to %s (%s), length=%d",
			ep->name, ep->is_in ? "IN/TX" : "OUT/RX",
			req->request.length);

@@ -1063,7 +1063,7 @@ static int musb_g_ep0_halt(struct usb_ep *e, int value)
		musb->ackpend = 0;
		break;
	default:
		dev_dbg(musb->controller, "ep0 can't halt in state %d\n", musb->ep0_state);
		musb_dbg(musb, "ep0 can't halt in state %d", musb->ep0_state);
		status = -EINVAL;
	}

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