Loading Documentation/devicetree/bindings/rtc/s3c-rtc.txt +2 −1 Original line number Diff line number Diff line Loading @@ -6,7 +6,8 @@ Required properties: * "samsung,s3c2416-rtc" - for controllers compatible with s3c2416 rtc. * "samsung,s3c2443-rtc" - for controllers compatible with s3c2443 rtc. * "samsung,s3c6410-rtc" - for controllers compatible with s3c6410 rtc. * "samsung,exynos3250-rtc" - for controllers compatible with exynos3250 rtc. * "samsung,exynos3250-rtc" - (deprecated) for controllers compatible with exynos3250 rtc (use "samsung,s3c6410-rtc"). - reg: physical base address of the controller and length of memory mapped region. - interrupts: Two interrupt numbers to the cpu should be specified. First Loading arch/arm/boot/dts/exynos3250-monk.dts +2 −1 Original line number Diff line number Diff line Loading @@ -16,6 +16,7 @@ #include "exynos3250.dtsi" #include <dt-bindings/input/input.h> #include <dt-bindings/gpio/gpio.h> #include <dt-bindings/clock/samsung,s2mps11.h> / { model = "Samsung Monk board"; Loading Loading @@ -432,7 +433,7 @@ }; &rtc { clocks = <&cmu CLK_RTC>, <&s2mps14_osc 0>; clocks = <&cmu CLK_RTC>, <&s2mps14_osc S2MPS11_CLK_AP>; clock-names = "rtc", "rtc_src"; status = "okay"; }; Loading arch/arm/boot/dts/exynos3250-rinato.dts +6 −1 Original line number Diff line number Diff line Loading @@ -16,6 +16,7 @@ #include "exynos3250.dtsi" #include <dt-bindings/input/input.h> #include <dt-bindings/gpio/gpio.h> #include <dt-bindings/clock/samsung,s2mps11.h> / { model = "Samsung Rinato board"; Loading Loading @@ -567,6 +568,10 @@ status = "okay"; }; &jpeg { status = "okay"; }; &mshc_0 { #address-cells = <1>; #size-cells = <0>; Loading Loading @@ -605,7 +610,7 @@ }; &rtc { clocks = <&cmu CLK_RTC>, <&s2mps14_osc 0>; clocks = <&cmu CLK_RTC>, <&s2mps14_osc S2MPS11_CLK_AP>; clock-names = "rtc", "rtc_src"; status = "okay"; }; Loading arch/arm/boot/dts/exynos3250.dtsi +14 −1 Original line number Diff line number Diff line Loading @@ -189,7 +189,7 @@ }; rtc: rtc@10070000 { compatible = "samsung,exynos3250-rtc"; compatible = "samsung,s3c6410-rtc"; reg = <0x10070000 0x100>; interrupts = <0 73 0>, <0 74 0>; interrupt-parent = <&pmu_system_controller>; Loading Loading @@ -243,6 +243,19 @@ interrupts = <0 240 0>; }; jpeg: codec@11830000 { compatible = "samsung,exynos3250-jpeg"; reg = <0x11830000 0x1000>; interrupts = <0 171 0>; clocks = <&cmu CLK_JPEG>, <&cmu CLK_SCLK_JPEG>; clock-names = "jpeg", "sclk"; power-domains = <&pd_cam>; assigned-clocks = <&cmu CLK_MOUT_CAM_BLK>, <&cmu CLK_SCLK_JPEG>; assigned-clock-rates = <0>, <150000000>; assigned-clock-parents = <&cmu CLK_DIV_MPLL_PRE>; status = "disabled"; }; fimd: fimd@11c00000 { compatible = "samsung,exynos3250-fimd"; reg = <0x11c00000 0x30000>; Loading arch/arm/boot/dts/exynos4.dtsi +10 −2 Original line number Diff line number Diff line Loading @@ -78,7 +78,6 @@ mipi_phy: video-phy@10020710 { compatible = "samsung,s5pv210-mipi-video-phy"; reg = <0x10020710 8>; #phy-cells = <1>; syscon = <&pmu_system_controller>; }; Loading Loading @@ -266,7 +265,7 @@ status = "disabled"; }; rtc@10070000 { rtc: rtc@10070000 { compatible = "samsung,s3c6410-rtc"; reg = <0x10070000 0x100>; interrupt-parent = <&pmu_system_controller>; Loading Loading @@ -689,6 +688,15 @@ #include "exynos4412-tmu-sensor-conf.dtsi" }; jpeg-codec@11840000 { compatible = "samsung,exynos4210-jpeg"; reg = <0x11840000 0x1000>; interrupts = <0 88 0>; clocks = <&clock CLK_JPEG>; clock-names = "jpeg"; power-domains = <&pd_cam>; }; hdmi: hdmi@12D00000 { compatible = "samsung,exynos4210-hdmi"; reg = <0x12D00000 0x70000>; Loading Loading
Documentation/devicetree/bindings/rtc/s3c-rtc.txt +2 −1 Original line number Diff line number Diff line Loading @@ -6,7 +6,8 @@ Required properties: * "samsung,s3c2416-rtc" - for controllers compatible with s3c2416 rtc. * "samsung,s3c2443-rtc" - for controllers compatible with s3c2443 rtc. * "samsung,s3c6410-rtc" - for controllers compatible with s3c6410 rtc. * "samsung,exynos3250-rtc" - for controllers compatible with exynos3250 rtc. * "samsung,exynos3250-rtc" - (deprecated) for controllers compatible with exynos3250 rtc (use "samsung,s3c6410-rtc"). - reg: physical base address of the controller and length of memory mapped region. - interrupts: Two interrupt numbers to the cpu should be specified. First Loading
arch/arm/boot/dts/exynos3250-monk.dts +2 −1 Original line number Diff line number Diff line Loading @@ -16,6 +16,7 @@ #include "exynos3250.dtsi" #include <dt-bindings/input/input.h> #include <dt-bindings/gpio/gpio.h> #include <dt-bindings/clock/samsung,s2mps11.h> / { model = "Samsung Monk board"; Loading Loading @@ -432,7 +433,7 @@ }; &rtc { clocks = <&cmu CLK_RTC>, <&s2mps14_osc 0>; clocks = <&cmu CLK_RTC>, <&s2mps14_osc S2MPS11_CLK_AP>; clock-names = "rtc", "rtc_src"; status = "okay"; }; Loading
arch/arm/boot/dts/exynos3250-rinato.dts +6 −1 Original line number Diff line number Diff line Loading @@ -16,6 +16,7 @@ #include "exynos3250.dtsi" #include <dt-bindings/input/input.h> #include <dt-bindings/gpio/gpio.h> #include <dt-bindings/clock/samsung,s2mps11.h> / { model = "Samsung Rinato board"; Loading Loading @@ -567,6 +568,10 @@ status = "okay"; }; &jpeg { status = "okay"; }; &mshc_0 { #address-cells = <1>; #size-cells = <0>; Loading Loading @@ -605,7 +610,7 @@ }; &rtc { clocks = <&cmu CLK_RTC>, <&s2mps14_osc 0>; clocks = <&cmu CLK_RTC>, <&s2mps14_osc S2MPS11_CLK_AP>; clock-names = "rtc", "rtc_src"; status = "okay"; }; Loading
arch/arm/boot/dts/exynos3250.dtsi +14 −1 Original line number Diff line number Diff line Loading @@ -189,7 +189,7 @@ }; rtc: rtc@10070000 { compatible = "samsung,exynos3250-rtc"; compatible = "samsung,s3c6410-rtc"; reg = <0x10070000 0x100>; interrupts = <0 73 0>, <0 74 0>; interrupt-parent = <&pmu_system_controller>; Loading Loading @@ -243,6 +243,19 @@ interrupts = <0 240 0>; }; jpeg: codec@11830000 { compatible = "samsung,exynos3250-jpeg"; reg = <0x11830000 0x1000>; interrupts = <0 171 0>; clocks = <&cmu CLK_JPEG>, <&cmu CLK_SCLK_JPEG>; clock-names = "jpeg", "sclk"; power-domains = <&pd_cam>; assigned-clocks = <&cmu CLK_MOUT_CAM_BLK>, <&cmu CLK_SCLK_JPEG>; assigned-clock-rates = <0>, <150000000>; assigned-clock-parents = <&cmu CLK_DIV_MPLL_PRE>; status = "disabled"; }; fimd: fimd@11c00000 { compatible = "samsung,exynos3250-fimd"; reg = <0x11c00000 0x30000>; Loading
arch/arm/boot/dts/exynos4.dtsi +10 −2 Original line number Diff line number Diff line Loading @@ -78,7 +78,6 @@ mipi_phy: video-phy@10020710 { compatible = "samsung,s5pv210-mipi-video-phy"; reg = <0x10020710 8>; #phy-cells = <1>; syscon = <&pmu_system_controller>; }; Loading Loading @@ -266,7 +265,7 @@ status = "disabled"; }; rtc@10070000 { rtc: rtc@10070000 { compatible = "samsung,s3c6410-rtc"; reg = <0x10070000 0x100>; interrupt-parent = <&pmu_system_controller>; Loading Loading @@ -689,6 +688,15 @@ #include "exynos4412-tmu-sensor-conf.dtsi" }; jpeg-codec@11840000 { compatible = "samsung,exynos4210-jpeg"; reg = <0x11840000 0x1000>; interrupts = <0 88 0>; clocks = <&clock CLK_JPEG>; clock-names = "jpeg"; power-domains = <&pd_cam>; }; hdmi: hdmi@12D00000 { compatible = "samsung,exynos4210-hdmi"; reg = <0x12D00000 0x70000>; Loading