Merge master.kernel.org:/pub/scm/linux/kernel/git/davej/x86 (b8c475be) · Commits · e / devices / android_kernel_teracube_emerald

arch/i386/kernel/cpu/centaur.c

+0 −4

Original line number	Original line	Diff line number	Diff line
	@@ -405,10 +405,6 @@ static void __init init_centaur(struct cpuinfo_x86 *c)
	winchip2_protect_mcr();		winchip2_protect_mcr();
	#endif		#endif
	break;		break;
	case 10:
	name="4";
	/* no info on the WC4 yet */
	break;
	default:		default:
	name="??";		name="??";
	}		}

arch/i386/kernel/cpu/intel_cacheinfo.c

+11 −0

Original line number	Original line	Diff line number	Diff line
	@@ -43,13 +43,23 @@ static struct _cache_table cache_table[] __cpuinitdata =
	{ 0x2c, LVL_1_DATA, 32 }, /* 8-way set assoc, 64 byte line size */		{ 0x2c, LVL_1_DATA, 32 }, /* 8-way set assoc, 64 byte line size */
	{ 0x30, LVL_1_INST, 32 }, /* 8-way set assoc, 64 byte line size */		{ 0x30, LVL_1_INST, 32 }, /* 8-way set assoc, 64 byte line size */
	{ 0x39, LVL_2, 128 }, /* 4-way set assoc, sectored cache, 64 byte line size */		{ 0x39, LVL_2, 128 }, /* 4-way set assoc, sectored cache, 64 byte line size */
			{ 0x3a, LVL_2, 192 }, /* 6-way set assoc, sectored cache, 64 byte line size */
	{ 0x3b, LVL_2, 128 }, /* 2-way set assoc, sectored cache, 64 byte line size */		{ 0x3b, LVL_2, 128 }, /* 2-way set assoc, sectored cache, 64 byte line size */
	{ 0x3c, LVL_2, 256 }, /* 4-way set assoc, sectored cache, 64 byte line size */		{ 0x3c, LVL_2, 256 }, /* 4-way set assoc, sectored cache, 64 byte line size */
			{ 0x3d, LVL_2, 384 }, /* 6-way set assoc, sectored cache, 64 byte line size */
			{ 0x3e, LVL_2, 512 }, /* 4-way set assoc, sectored cache, 64 byte line size */
	{ 0x41, LVL_2, 128 }, /* 4-way set assoc, 32 byte line size */		{ 0x41, LVL_2, 128 }, /* 4-way set assoc, 32 byte line size */
	{ 0x42, LVL_2, 256 }, /* 4-way set assoc, 32 byte line size */		{ 0x42, LVL_2, 256 }, /* 4-way set assoc, 32 byte line size */
	{ 0x43, LVL_2, 512 }, /* 4-way set assoc, 32 byte line size */		{ 0x43, LVL_2, 512 }, /* 4-way set assoc, 32 byte line size */
	{ 0x44, LVL_2, 1024 }, /* 4-way set assoc, 32 byte line size */		{ 0x44, LVL_2, 1024 }, /* 4-way set assoc, 32 byte line size */
	{ 0x45, LVL_2, 2048 }, /* 4-way set assoc, 32 byte line size */		{ 0x45, LVL_2, 2048 }, /* 4-way set assoc, 32 byte line size */
			{ 0x46, LVL_3, 4096 }, /* 4-way set assoc, 64 byte line size */
			{ 0x47, LVL_3, 8192 }, /* 8-way set assoc, 64 byte line size */
			{ 0x49, LVL_3, 4096 }, /* 16-way set assoc, 64 byte line size */
			{ 0x4a, LVL_3, 6144 }, /* 12-way set assoc, 64 byte line size */
			{ 0x4b, LVL_3, 8192 }, /* 16-way set assoc, 64 byte line size */
			{ 0x4c, LVL_3, 12288 }, /* 12-way set assoc, 64 byte line size */
			{ 0x4d, LVL_3, 16384 }, /* 16-way set assoc, 64 byte line size */
	{ 0x60, LVL_1_DATA, 16 }, /* 8-way set assoc, sectored cache, 64 byte line size */		{ 0x60, LVL_1_DATA, 16 }, /* 8-way set assoc, sectored cache, 64 byte line size */
	{ 0x66, LVL_1_DATA, 8 }, /* 4-way set assoc, sectored cache, 64 byte line size */		{ 0x66, LVL_1_DATA, 8 }, /* 4-way set assoc, sectored cache, 64 byte line size */
	{ 0x67, LVL_1_DATA, 16 }, /* 4-way set assoc, sectored cache, 64 byte line size */		{ 0x67, LVL_1_DATA, 16 }, /* 4-way set assoc, sectored cache, 64 byte line size */
	@@ -57,6 +67,7 @@ static struct _cache_table cache_table[] __cpuinitdata =
	{ 0x70, LVL_TRACE, 12 }, /* 8-way set assoc */		{ 0x70, LVL_TRACE, 12 }, /* 8-way set assoc */
	{ 0x71, LVL_TRACE, 16 }, /* 8-way set assoc */		{ 0x71, LVL_TRACE, 16 }, /* 8-way set assoc */
	{ 0x72, LVL_TRACE, 32 }, /* 8-way set assoc */		{ 0x72, LVL_TRACE, 32 }, /* 8-way set assoc */
			{ 0x73, LVL_TRACE, 64 }, /* 8-way set assoc */
	{ 0x78, LVL_2, 1024 }, /* 4-way set assoc, 64 byte line size */		{ 0x78, LVL_2, 1024 }, /* 4-way set assoc, 64 byte line size */
	{ 0x79, LVL_2, 128 }, /* 8-way set assoc, sectored cache, 64 byte line size */		{ 0x79, LVL_2, 128 }, /* 8-way set assoc, sectored cache, 64 byte line size */
	{ 0x7a, LVL_2, 256 }, /* 8-way set assoc, sectored cache, 64 byte line size */		{ 0x7a, LVL_2, 256 }, /* 8-way set assoc, sectored cache, 64 byte line size */

arch/i386/kernel/cpu/mtrr/main.c

+6 −9

Original line number	Original line	Diff line number	Diff line
	@@ -44,12 +44,10 @@
	#include <asm/msr.h>		#include <asm/msr.h>
	#include "mtrr.h"		#include "mtrr.h"

	#define MTRR_VERSION "2.0 (20020519)"

	u32 num_var_ranges = 0;		u32 num_var_ranges = 0;

	unsigned int *usage_table;		unsigned int *usage_table;
	static DECLARE_MUTEX(main_lock);		static DECLARE_MUTEX(mtrr_sem);

	u32 size_or_mask, size_and_mask;		u32 size_or_mask, size_and_mask;

	@@ -335,7 +333,7 @@ int mtrr_add_page(unsigned long base, unsigned long size,
	/* No CPU hotplug when we change MTRR entries */		/* No CPU hotplug when we change MTRR entries */
	lock_cpu_hotplug();		lock_cpu_hotplug();
	/* Search for existing MTRR */		/* Search for existing MTRR */
	down(&main_lock);		down(&mtrr_sem);
	for (i = 0; i < num_var_ranges; ++i) {		for (i = 0; i < num_var_ranges; ++i) {
	mtrr_if->get(i, &lbase, &lsize, &ltype);		mtrr_if->get(i, &lbase, &lsize, &ltype);
	if (base >= lbase + lsize)		if (base >= lbase + lsize)
	@@ -373,7 +371,7 @@ int mtrr_add_page(unsigned long base, unsigned long size,
	printk(KERN_INFO "mtrr: no more MTRRs available\n");		printk(KERN_INFO "mtrr: no more MTRRs available\n");
	error = i;		error = i;
	out:		out:
	up(&main_lock);		up(&mtrr_sem);
	unlock_cpu_hotplug();		unlock_cpu_hotplug();
	return error;		return error;
	}		}
	@@ -466,7 +464,7 @@ int mtrr_del_page(int reg, unsigned long base, unsigned long size)
	max = num_var_ranges;		max = num_var_ranges;
	/* No CPU hotplug when we change MTRR entries */		/* No CPU hotplug when we change MTRR entries */
	lock_cpu_hotplug();		lock_cpu_hotplug();
	down(&main_lock);		down(&mtrr_sem);
	if (reg < 0) {		if (reg < 0) {
	/* Search for existing MTRR */		/* Search for existing MTRR */
	for (i = 0; i < max; ++i) {		for (i = 0; i < max; ++i) {
	@@ -505,7 +503,7 @@ int mtrr_del_page(int reg, unsigned long base, unsigned long size)
	set_mtrr(reg, 0, 0, 0);		set_mtrr(reg, 0, 0, 0);
	error = reg;		error = reg;
	out:		out:
	up(&main_lock);		up(&mtrr_sem);
	unlock_cpu_hotplug();		unlock_cpu_hotplug();
	return error;		return error;
	}		}
	@@ -671,7 +669,6 @@ void __init mtrr_bp_init(void)
	break;		break;
	}		}
	}		}
	printk(KERN_INFO "mtrr: v%s\n",MTRR_VERSION);

	if (mtrr_if) {		if (mtrr_if) {
	set_num_var_ranges();		set_num_var_ranges();
	@@ -688,7 +685,7 @@ void mtrr_ap_init(void)
	if (!mtrr_if \|\| !use_intel())		if (!mtrr_if \|\| !use_intel())
	return;		return;
	/*		/*
	* Ideally we should hold main_lock here to avoid mtrr entries changed,		* Ideally we should hold mtrr_sem here to avoid mtrr entries changed,
	* but this routine will be called in cpu boot time, holding the lock		* but this routine will be called in cpu boot time, holding the lock
	* breaks it. This routine is called in two cases: 1.very earily time		* breaks it. This routine is called in two cases: 1.very earily time
	* of software resume, when there absolutely isn't mtrr entry changes;		* of software resume, when there absolutely isn't mtrr entry changes;