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Commit b8845074 authored by Tero Kristo's avatar Tero Kristo
Browse files

ARM: dts: omap3: add minimal l4 bus layout with control module support 



This patch creates an l4_core interconnect for OMAP3, and moves some
of the generic peripherals under it. System control module nodes are
moved under this new interconnect also, and the SCM clock layout
is changed to use the renamed SCM node as the clock provider.

Signed-off-by: default avatarTero Kristo <t-kristo@ti.com>
Reported-by: default avatarTony Lindgren <tony@atomide.com>
parent 72b10ac0

Documentation/devicetree/bindings/arm/omap/l4.txt

+1 −0
Original line number Diff line number Diff line
@@ -5,6 +5,7 @@ These bindings describe the OMAP SoCs L4 interconnect bus. 
Required properties:

- compatible : Should be "ti,omap2-l4" for OMAP2 family l4 core bus

	       Should be "ti,omap2-l4-wkup" for OMAP2 family l4 wkup bus

	       Should be "ti,omap3-l4-core" for OMAP3 family l4 core bus

- ranges : contains the IO map range for the bus



Examples:

Documentation/devicetree/bindings/arm/omap/prcm.txt

+1 −1
Original line number Diff line number Diff line
@@ -17,7 +17,7 @@ Required properties: 
		"ti,omap2-scm"

		"ti,omap3-prm"

		"ti,omap3-cm"

		"ti,omap3-scrm"

		"ti,omap3-scm"

		"ti,omap4-cm1"

		"ti,omap4-prm"

		"ti,omap4-cm2"

arch/arm/boot/dts/am3517.dtsi

+1 −1
Original line number Diff line number Diff line
@@ -31,7 +31,7 @@ 
			status = "disabled";

			reg = <0x5c000000 0x30000>;

			interrupts = <67 68 69 70>;

			syscon = <&omap3_scm_general>;

			syscon = <&scm_conf>;

			ti,davinci-ctrl-reg-offset = <0x10000>;

			ti,davinci-ctrl-mod-reg-offset = <0>;

			ti,davinci-ctrl-ram-offset = <0x20000>;

arch/arm/boot/dts/am35xx-clocks.dtsi

+1 −1
Original line number Diff line number Diff line
@@ -7,7 +7,7 @@ 
 * it under the terms of the GNU General Public License version 2 as

 * published by the Free Software Foundation.

 */

&scrm_clocks {

&scm_clocks {

	emac_ick: emac_ick {

		#clock-cells = <0>;

		compatible = "ti,am35xx-gate-clock";

arch/arm/boot/dts/omap3.dtsi

+55 −41
Original line number Diff line number Diff line
@@ -87,6 +87,60 @@ 
		ranges;

		ti,hwmods = "l3_main";



		l4_core: l4@48000000 {

			compatible = "ti,omap3-l4-core", "simple-bus";

			#address-cells = <1>;

			#size-cells = <1>;

			ranges = <0 0x48000000 0x1000000>;



			scm: scm@2000 {

				compatible = "ti,omap3-scm", "simple-bus";

				reg = <0x2000 0x2000>;

				#address-cells = <1>;

				#size-cells = <1>;

				ranges = <0 0x2000 0x2000>;



				omap3_pmx_core: pinmux@30 {

					compatible = "ti,omap3-padconf",

						     "pinctrl-single";

					reg = <0x30 0x238>;

					#address-cells = <1>;

					#size-cells = <0>;

					#interrupt-cells = <1>;

					interrupt-controller;

					pinctrl-single,register-width = <16>;

					pinctrl-single,function-mask = <0xff1f>;

				};



				scm_conf: scm_conf@270 {

					compatible = "syscon";

					reg = <0x270 0x330>;

					#address-cells = <1>;

					#size-cells = <1>;



					scm_clocks: clocks {

						#address-cells = <1>;

						#size-cells = <0>;

					};

				};



				scm_clockdomains: clockdomains {

				};



				omap3_pmx_wkup: pinmux@a00 {

					compatible = "ti,omap3-padconf",

						     "pinctrl-single";

					reg = <0xa00 0x5c>;

					#address-cells = <1>;

					#size-cells = <0>;

					#interrupt-cells = <1>;

					interrupt-controller;

					pinctrl-single,register-width = <16>;

					pinctrl-single,function-mask = <0xff1f>;

				};

			};

		};



		aes: aes@480c5000 {

			compatible = "ti,omap3-aes";

			ti,hwmods = "aes";
@@ -121,19 +175,6 @@ 
			};

		};



		scrm: scrm@48002000 {

			compatible = "ti,omap3-scrm";

			reg = <0x48002000 0x2000>;



			scrm_clocks: clocks {

				#address-cells = <1>;

				#size-cells = <0>;

			};



			scrm_clockdomains: clockdomains {

			};

		};



		counter32k: counter@48320000 {

			compatible = "ti,omap-counter32k";

			reg = <0x48320000 0x20>;
@@ -159,37 +200,10 @@ 
			#dma-requests = <96>;

		};



		omap3_pmx_core: pinmux@48002030 {

			compatible = "ti,omap3-padconf", "pinctrl-single";

			reg = <0x48002030 0x0238>;

			#address-cells = <1>;

			#size-cells = <0>;

			#interrupt-cells = <1>;

			interrupt-controller;

			pinctrl-single,register-width = <16>;

			pinctrl-single,function-mask = <0xff1f>;

		};



		omap3_pmx_wkup: pinmux@48002a00 {

			compatible = "ti,omap3-padconf", "pinctrl-single";

			reg = <0x48002a00 0x5c>;

			#address-cells = <1>;

			#size-cells = <0>;

			#interrupt-cells = <1>;

			interrupt-controller;

			pinctrl-single,register-width = <16>;

			pinctrl-single,function-mask = <0xff1f>;

		};



		omap3_scm_general: tisyscon@48002270 {

			compatible = "syscon";

			reg = <0x48002270 0x2f0>;

		};



		pbias_regulator: pbias_regulator {

			compatible = "ti,pbias-omap";

			reg = <0x2b0 0x4>;

			syscon = <&omap3_scm_general>;

			syscon = <&scm_conf>;

			pbias_mmc_reg: pbias_mmc_omap2430 {

				regulator-name = "pbias_mmc_omap2430";

				regulator-min-microvolt = <1800000>;