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Commit b861686b authored by Dave Airlie's avatar Dave Airlie
Browse files

Merge tag 'vmwgfx-next-4.19-3' of git://people.freedesktop.org/~thomash/linux into drm-next 



This introduces a header update and support for multisample surfaces.

Signed-off-by: default avatarDave Airlie <airlied@redhat.com>
Link: https://patchwork.freedesktop.org/patch/msgid/d020efb8-776d-5e8f-9d9f-122591e074d6@vmware.com
parents 8038d2a9 9b07b287

drivers/gpu/drm/vmwgfx/device_include/svga3d_cmd.h

+171 −59
Original line number Diff line number Diff line
@@ -47,10 +47,10 @@ 
 * the SVGA3D protocol and remain reserved; they should not be used in the

 * future.

 *

 * IDs between 1040 and 1999 (inclusive) are available for use by the

 * IDs between 1040 and 2999 (inclusive) are available for use by the

 * current SVGA3D protocol.

 *

 * FIFO clients other than SVGA3D should stay below 1000, or at 2000

 * FIFO clients other than SVGA3D should stay below 1000, or at 3000

 * and up.

 */
@@ -90,19 +90,19 @@ typedef enum { 
   SVGA_3D_CMD_BLIT_SURFACE_TO_SCREEN                     = 1069,

   SVGA_3D_CMD_SURFACE_DEFINE_V2                          = 1070,

   SVGA_3D_CMD_GENERATE_MIPMAPS                           = 1071,

   SVGA_3D_CMD_VIDEO_CREATE_DECODER                       = 1072,

   SVGA_3D_CMD_VIDEO_DESTROY_DECODER                      = 1073,

   SVGA_3D_CMD_VIDEO_CREATE_PROCESSOR                     = 1074,

   SVGA_3D_CMD_VIDEO_DESTROY_PROCESSOR                    = 1075,

   SVGA_3D_CMD_VIDEO_DECODE_START_FRAME                   = 1076,

   SVGA_3D_CMD_VIDEO_DECODE_RENDER                        = 1077,

   SVGA_3D_CMD_VIDEO_DECODE_END_FRAME                     = 1078,

   SVGA_3D_CMD_VIDEO_PROCESS_FRAME                        = 1079,

   SVGA_3D_CMD_DEAD4                                      = 1072,

   SVGA_3D_CMD_DEAD5                                      = 1073,

   SVGA_3D_CMD_DEAD6                                      = 1074,

   SVGA_3D_CMD_DEAD7                                      = 1075,

   SVGA_3D_CMD_DEAD8                                      = 1076,

   SVGA_3D_CMD_DEAD9                                      = 1077,

   SVGA_3D_CMD_DEAD10                                     = 1078,

   SVGA_3D_CMD_DEAD11                                     = 1079,

   SVGA_3D_CMD_ACTIVATE_SURFACE                           = 1080,

   SVGA_3D_CMD_DEACTIVATE_SURFACE                         = 1081,

   SVGA_3D_CMD_SCREEN_DMA                                 = 1082,

   SVGA_3D_CMD_SET_UNITY_SURFACE_COOKIE                   = 1083,

   SVGA_3D_CMD_OPEN_CONTEXT_SURFACE                       = 1084,

   SVGA_3D_CMD_DEAD1                                      = 1083,

   SVGA_3D_CMD_DEAD2                                      = 1084,



   SVGA_3D_CMD_LOGICOPS_BITBLT                            = 1085,

   SVGA_3D_CMD_LOGICOPS_TRANSBLT                          = 1086,
@@ -218,7 +218,7 @@ typedef enum { 
   SVGA_3D_CMD_DX_CLEAR_DEPTHSTENCIL_VIEW                 = 1177,

   SVGA_3D_CMD_DX_PRED_COPY_REGION                        = 1178,

   SVGA_3D_CMD_DX_PRED_COPY                               = 1179,

   SVGA_3D_CMD_DX_STRETCHBLT                              = 1180,

   SVGA_3D_CMD_DX_PRESENTBLT                              = 1180,

   SVGA_3D_CMD_DX_GENMIPS                                 = 1181,

   SVGA_3D_CMD_DX_UPDATE_SUBRESOURCE                      = 1182,

   SVGA_3D_CMD_DX_READBACK_SUBRESOURCE                    = 1183,
@@ -255,7 +255,7 @@ typedef enum { 
   SVGA_3D_CMD_DX_READBACK_ALL_QUERY                      = 1214,

   SVGA_3D_CMD_DX_PRED_TRANSFER_FROM_BUFFER               = 1215,

   SVGA_3D_CMD_DX_MOB_FENCE_64                            = 1216,

   SVGA_3D_CMD_DX_BIND_SHADER_ON_CONTEXT                  = 1217,

   SVGA_3D_CMD_DX_BIND_ALL_SHADER                         = 1217,

   SVGA_3D_CMD_DX_HINT                                    = 1218,

   SVGA_3D_CMD_DX_BUFFER_UPDATE                           = 1219,

   SVGA_3D_CMD_DX_SET_VS_CONSTANT_BUFFER_OFFSET           = 1220,
@@ -263,17 +263,47 @@ typedef enum { 
   SVGA_3D_CMD_DX_SET_GS_CONSTANT_BUFFER_OFFSET           = 1222,



   /*

    * Reserve some IDs to be used for the DX11 shader types.

    * Reserve some IDs to be used for the SM5 shader types.

    */

   SVGA_3D_CMD_DX_RESERVED1                               = 1223,

   SVGA_3D_CMD_DX_RESERVED2                               = 1224,

   SVGA_3D_CMD_DX_RESERVED3                               = 1225,



   SVGA_3D_CMD_DX_MAX                                     = 1226,

   SVGA_3D_CMD_MAX                                        = 1226,

   SVGA_3D_CMD_DX_COND_BIND_ALL_SHADER                    = 1226,

   SVGA_3D_CMD_DX_MAX                                     = 1227,



   SVGA_3D_CMD_SCREEN_COPY                                = 1227,



   /*

    * Reserve some IDs to be used for video.

    */

   SVGA_3D_CMD_VIDEO_RESERVED1                            = 1228,

   SVGA_3D_CMD_VIDEO_RESERVED2                            = 1229,

   SVGA_3D_CMD_VIDEO_RESERVED3                            = 1230,

   SVGA_3D_CMD_VIDEO_RESERVED4                            = 1231,

   SVGA_3D_CMD_VIDEO_RESERVED5                            = 1232,

   SVGA_3D_CMD_VIDEO_RESERVED6                            = 1233,

   SVGA_3D_CMD_VIDEO_RESERVED7                            = 1234,

   SVGA_3D_CMD_VIDEO_RESERVED8                            = 1235,



   SVGA_3D_CMD_GROW_OTABLE                                = 1236,

   SVGA_3D_CMD_DX_GROW_COTABLE                            = 1237,

   SVGA_3D_CMD_INTRA_SURFACE_COPY                         = 1238,



   SVGA_3D_CMD_DEFINE_GB_SURFACE_V3                       = 1239,



   SVGA_3D_CMD_DX_RESOLVE_COPY                            = 1240,

   SVGA_3D_CMD_DX_PRED_RESOLVE_COPY                       = 1241,

   SVGA_3D_CMD_DX_PRED_CONVERT_REGION                     = 1242,

   SVGA_3D_CMD_DX_PRED_CONVERT                            = 1243,

   SVGA_3D_CMD_WHOLE_SURFACE_COPY                         = 1244,



   SVGA_3D_CMD_MAX                                        = 1245,

   SVGA_3D_CMD_FUTURE_MAX                                 = 3000

} SVGAFifo3dCmdId;



#define SVGA_NUM_3D_CMD (SVGA_3D_CMD_MAX - SVGA_3D_CMD_BASE)



/*

 * FIFO command format definitions:

 */
@@ -302,7 +332,7 @@ typedef 
#include "vmware_pack_begin.h"

struct {

   uint32                      sid;

   SVGA3dSurfaceFlags          surfaceFlags;

   SVGA3dSurface1Flags         surfaceFlags;

   SVGA3dSurfaceFormat         format;

   /*

    * If surfaceFlags has SVGA3D_SURFACE_CUBEMAP bit set, all SVGA3dSurfaceFace
@@ -328,7 +358,7 @@ typedef 
#include "vmware_pack_begin.h"

struct {

   uint32                      sid;

   SVGA3dSurfaceFlags          surfaceFlags;

   SVGA3dSurface1Flags         surfaceFlags;

   SVGA3dSurfaceFormat         format;

   /*

    * If surfaceFlags has SVGA3D_SURFACE_CUBEMAP bit set, all SVGA3dSurfaceFace
@@ -460,6 +490,28 @@ struct { 
#include "vmware_pack_end.h"

SVGA3dCmdSurfaceCopy;               /* SVGA_3D_CMD_SURFACE_COPY */



/*

 * Perform a surface copy within the same image.

 * The src/dest boxes are allowed to overlap.

 */

typedef

#include "vmware_pack_begin.h"

struct {

   SVGA3dSurfaceImageId  surface;

   SVGA3dCopyBox box;

}

#include "vmware_pack_end.h"

SVGA3dCmdIntraSurfaceCopy;               /* SVGA_3D_CMD_INTRA_SURFACE_COPY */



typedef

#include "vmware_pack_begin.h"

struct {

   uint32 srcSid;

   uint32 destSid;

}

#include "vmware_pack_end.h"

SVGA3dCmdWholeSurfaceCopy;               /* SVGA_3D_CMD_WHOLE_SURFACE_COPY */



typedef

#include "vmware_pack_begin.h"

struct {
@@ -773,6 +825,17 @@ struct { 
#include "vmware_pack_end.h"

SVGA3dVertexElement;



/*

 * Should the vertex element respect the stream value?  The high bit of the

 * stream should be set to indicate that the stream should be respected.  If

 * the high bit is not set, the stream will be ignored and replaced by the index

 * of the position of the currently considered vertex element.

 *

 * All guests should set this bit and correctly specify the stream going

 * forward.

 */

#define SVGA3D_VERTEX_ELEMENT_RESPECT_STREAM (1 << 7)



typedef

#include "vmware_pack_begin.h"

struct {
@@ -1103,8 +1166,6 @@ struct { 
#include "vmware_pack_end.h"

SVGA3dCmdGenerateMipmaps;             /* SVGA_3D_CMD_GENERATE_MIPMAPS */







typedef

#include "vmware_pack_begin.h"

struct {
@@ -1147,38 +1208,6 @@ struct SVGA3dCmdScreenDMA { 
#include "vmware_pack_end.h"

SVGA3dCmdScreenDMA;        /* SVGA_3D_CMD_SCREEN_DMA */



/*

 * Set Unity Surface Cookie

 *

 * Associates the supplied cookie with the surface id for use with

 * Unity.  This cookie is a hint from guest to host, there is no way

 * for the guest to readback the cookie and the host is free to drop

 * the cookie association at will.  The default value for the cookie

 * on all surfaces is 0.

 */



typedef

#include "vmware_pack_begin.h"

struct SVGA3dCmdSetUnitySurfaceCookie {

   uint32 sid;

   uint64 cookie;

}

#include "vmware_pack_end.h"

SVGA3dCmdSetUnitySurfaceCookie;   /* SVGA_3D_CMD_SET_UNITY_SURFACE_COOKIE */



/*

 * Open a context-specific surface in a non-context-specific manner.

 */



typedef

#include "vmware_pack_begin.h"

struct SVGA3dCmdOpenContextSurface {

   uint32 sid;

}

#include "vmware_pack_end.h"

SVGA3dCmdOpenContextSurface;   /* SVGA_3D_CMD_OPEN_CONTEXT_SURFACE */





/*

 * Logic ops

 */
@@ -1325,7 +1354,7 @@ typedef 
#include "vmware_pack_begin.h"

struct {

   SVGA3dSurfaceFormat format;

   SVGA3dSurfaceFlags surfaceFlags;

   SVGA3dSurface1Flags surface1Flags;

   uint32 numMipLevels;

   uint32 multisampleCount;

   SVGA3dTextureFilter autogenFilter;
@@ -1333,7 +1362,11 @@ struct { 
   SVGAMobId mobid;

   uint32 arraySize;

   uint32 mobPitch;

   uint32 pad[5];

   SVGA3dSurface2Flags surface2Flags;

   uint8 multisamplePattern;

   uint8 qualityLevel;

   uint8  pad0[2];

   uint32 pad1[3];

}

#include "vmware_pack_end.h"

SVGAOTableSurfaceEntry;
@@ -1362,6 +1395,7 @@ SVGAOTableShaderEntry; 
#define SVGA3D_OTABLE_SHADER_ENTRY_SIZE (sizeof(SVGAOTableShaderEntry))



#define SVGA_STFLAG_PRIMARY  (1 << 0)

#define SVGA_STFLAG_RESERVED (1 << 1) /* Added with cap SVGA_CAP_HP_CMD_QUEUE */

typedef uint32 SVGAScreenTargetFlags;



typedef
@@ -1529,6 +1563,25 @@ struct { 
#include "vmware_pack_end.h"

SVGA3dCmdSetOTableBase64;  /* SVGA_3D_CMD_SET_OTABLE_BASE64 */



/*

 * Guests using SVGA_3D_CMD_GROW_OTABLE are promising that

 * the new OTable contains the same contents as the old one, except possibly

 * for some new invalid entries at the end.

 *

 * (Otherwise, guests should use one of the SetOTableBase commands.)

 */

typedef

#include "vmware_pack_begin.h"

struct {

   SVGAOTableType type;

   PPN64 baseAddress;

   uint32 sizeInBytes;

   uint32 validSizeInBytes;

   SVGAMobFormat ptDepth;

}

#include "vmware_pack_end.h"

SVGA3dCmdGrowOTable;  /* SVGA_3D_CMD_GROW_OTABLE */



typedef

#include "vmware_pack_begin.h"

struct {
@@ -1616,7 +1669,7 @@ typedef 
#include "vmware_pack_begin.h"

struct SVGA3dCmdDefineGBSurface {

   uint32 sid;

   SVGA3dSurfaceFlags surfaceFlags;

   SVGA3dSurface1Flags surfaceFlags;

   SVGA3dSurfaceFormat format;

   uint32 numMipLevels;

   uint32 multisampleCount;
@@ -1626,6 +1679,45 @@ struct SVGA3dCmdDefineGBSurface { 
#include "vmware_pack_end.h"

SVGA3dCmdDefineGBSurface;   /* SVGA_3D_CMD_DEFINE_GB_SURFACE */



/*

 * Defines a guest-backed surface, adding the arraySize field.

 */

typedef

#include "vmware_pack_begin.h"

struct SVGA3dCmdDefineGBSurface_v2 {

   uint32 sid;

   SVGA3dSurface1Flags surfaceFlags;

   SVGA3dSurfaceFormat format;

   uint32 numMipLevels;

   uint32 multisampleCount;

   SVGA3dTextureFilter autogenFilter;

   SVGA3dSize size;

   uint32 arraySize;

   uint32 pad;

}

#include "vmware_pack_end.h"

SVGA3dCmdDefineGBSurface_v2;   /* SVGA_3D_CMD_DEFINE_GB_SURFACE_V2 */



/*

 * Defines a guest-backed surface, adding the larger flags.

 */

typedef

#include "vmware_pack_begin.h"

struct SVGA3dCmdDefineGBSurface_v3 {

   uint32 sid;

   SVGA3dSurfaceAllFlags surfaceFlags;

   SVGA3dSurfaceFormat format;

   uint32 numMipLevels;

   uint32 multisampleCount;

   SVGA3dMSPattern multisamplePattern;

   SVGA3dMSQualityLevel qualityLevel;

   SVGA3dTextureFilter autogenFilter;

   SVGA3dSize size;

   uint32 arraySize;

}

#include "vmware_pack_end.h"

SVGA3dCmdDefineGBSurface_v3;   /* SVGA_3D_CMD_DEFINE_GB_SURFACE_V3 */



/*

 * Destroy a guest-backed surface.

 */
@@ -1673,7 +1765,7 @@ SVGA3dCmdBindGBSurfaceWithPitch; /* SVGA_3D_CMD_BIND_GB_SURFACE_WITH_PITCH */ 


typedef

#include "vmware_pack_begin.h"

struct{

struct SVGA3dCmdCondBindGBSurface {

   uint32 sid;

   SVGAMobId testMobid;

   SVGAMobId mobid;
@@ -2069,4 +2161,24 @@ struct { 
#include "vmware_pack_end.h"

SVGA3dCmdGBMobFence;  /* SVGA_3D_CMD_GB_MOB_FENCE */



typedef

#include "vmware_pack_begin.h"

struct {

   uint32 stid;

   SVGA3dSurfaceImageId dest;



   uint32 statusMobId;

   uint32 statusMobOffset;



   /* Reserved fields */

   uint32 mustBeInvalidId;

   uint32 mustBeZero;

}

#include "vmware_pack_end.h"

SVGA3dCmdScreenCopy;  /* SVGA_3D_CMD_SCREEN_COPY */



#define SVGA_SCREEN_COPY_STATUS_FAILURE 0x00

#define SVGA_SCREEN_COPY_STATUS_SUCCESS 0x01

#define SVGA_SCREEN_COPY_STATUS_INVALID 0xFFFFFFFF



#endif /* _SVGA3D_CMD_H_ */

drivers/gpu/drm/vmwgfx/device_include/svga3d_devcaps.h

+53 −30
Original line number Diff line number Diff line
@@ -230,9 +230,9 @@ typedef enum { 
   SVGA3D_DEVCAP_DEAD2                             = 94,



   /*

    * Does the device support the DX commands?

    * Does the device support DXContexts?

    */

   SVGA3D_DEVCAP_DX                                = 95,

   SVGA3D_DEVCAP_DXCONTEXT                         = 95,



   /*

    * What is the maximum size of a texture array?
@@ -242,21 +242,47 @@ typedef enum { 
   SVGA3D_DEVCAP_MAX_TEXTURE_ARRAY_SIZE            = 96,



   /*

    * What is the maximum number of vertex buffers that can

    * be used in the DXContext inputAssembly?

    * What is the maximum number of vertex buffers or vertex input registers

    * that can be expected to work correctly with a DXContext?

    *

    * The guest is allowed to set up to SVGA3D_DX_MAX_VERTEXBUFFERS, but

    * anything in excess of this cap is not guaranteed to render correctly.

    *

    * Similarly, the guest can set up to SVGA3D_DX_MAX_VERTEXINPUTREGISTERS

    * input registers without the SVGA3D_DEVCAP_SM4_1 cap, or

    * SVGA3D_DX_SM41_MAX_VERTEXINPUTREGISTERS with the SVGA3D_DEVCAP_SM4_1,

    * but only the registers up to this cap value are guaranteed to render

    * correctly.

    *

    * If guest-drivers are able to expose a lower-limit, it's recommended

    * that they clamp to this value.  Otherwise, the host will make a

    * best-effort on case-by-case basis if guests exceed this.

    */

   SVGA3D_DEVCAP_DX_MAX_VERTEXBUFFERS              = 97,



   /*

    * What is the maximum number of constant buffers

    * that can be expected to work correctly with a

    * DX context?

    * What is the maximum number of constant buffers that can be expected to

    * work correctly with a DX context?

    *

    * The guest is allowed to set up to SVGA3D_DX_MAX_CONSTBUFFERS, but

    * anything in excess of this cap is not guaranteed to render correctly.

    *

    * If guest-drivers are able to expose a lower-limit, it's recommended

    * that they clamp to this value.  Otherwise, the host will make a

    * best-effort on case-by-case basis if guests exceed this.

    */

   SVGA3D_DEVCAP_DX_MAX_CONSTANT_BUFFERS           = 98,



   /*

    * Does the device support provoking vertex control?

    * If zero, the first vertex will always be the provoking vertex.

    *

    * If this cap is present, the provokingVertexLast field in the

    * rasterizer state is enabled.  (Guests can then set it to FALSE,

    * meaning that the first vertex is the provoking vertex, or TRUE,

    * meaning that the last verteix is the provoking vertex.)

    *

    * If this cap is FALSE, then guests should set the provokingVertexLast

    * to FALSE, otherwise rendering behavior is undefined.

    */

   SVGA3D_DEVCAP_DX_PROVOKING_VERTEX               = 99,
@@ -282,7 +308,7 @@ typedef enum { 
   SVGA3D_DEVCAP_DXFMT_BUMPU8V8                    = 119,

   SVGA3D_DEVCAP_DXFMT_BUMPL6V5U5                  = 120,

   SVGA3D_DEVCAP_DXFMT_BUMPX8L8V8U8                = 121,

   SVGA3D_DEVCAP_DXFMT_BUMPL8V8U8                  = 122,

   SVGA3D_DEVCAP_DXFMT_FORMAT_DEAD1                = 122,

   SVGA3D_DEVCAP_DXFMT_ARGB_S10E5                  = 123,

   SVGA3D_DEVCAP_DXFMT_ARGB_S23E8                  = 124,

   SVGA3D_DEVCAP_DXFMT_A2R10G10B10                 = 125,
@@ -321,8 +347,8 @@ typedef enum { 
   SVGA3D_DEVCAP_DXFMT_R32G32_SINT                 = 158,

   SVGA3D_DEVCAP_DXFMT_R32G8X24_TYPELESS           = 159,

   SVGA3D_DEVCAP_DXFMT_D32_FLOAT_S8X24_UINT        = 160,

   SVGA3D_DEVCAP_DXFMT_R32_FLOAT_X8X24_TYPELESS    = 161,

   SVGA3D_DEVCAP_DXFMT_X32_TYPELESS_G8X24_UINT     = 162,

   SVGA3D_DEVCAP_DXFMT_R32_FLOAT_X8X24             = 161,

   SVGA3D_DEVCAP_DXFMT_X32_G8X24_UINT              = 162,

   SVGA3D_DEVCAP_DXFMT_R10G10B10A2_TYPELESS        = 163,

   SVGA3D_DEVCAP_DXFMT_R10G10B10A2_UINT            = 164,

   SVGA3D_DEVCAP_DXFMT_R11G11B10_FLOAT             = 165,
@@ -340,8 +366,8 @@ typedef enum { 
   SVGA3D_DEVCAP_DXFMT_R32_SINT                    = 177,

   SVGA3D_DEVCAP_DXFMT_R24G8_TYPELESS              = 178,

   SVGA3D_DEVCAP_DXFMT_D24_UNORM_S8_UINT           = 179,

   SVGA3D_DEVCAP_DXFMT_R24_UNORM_X8_TYPELESS       = 180,

   SVGA3D_DEVCAP_DXFMT_X24_TYPELESS_G8_UINT        = 181,

   SVGA3D_DEVCAP_DXFMT_R24_UNORM_X8                = 180,

   SVGA3D_DEVCAP_DXFMT_X24_G8_UINT                 = 181,

   SVGA3D_DEVCAP_DXFMT_R8G8_TYPELESS               = 182,

   SVGA3D_DEVCAP_DXFMT_R8G8_UNORM                  = 183,

   SVGA3D_DEVCAP_DXFMT_R8G8_UINT                   = 184,
@@ -405,6 +431,17 @@ typedef enum { 
   SVGA3D_DEVCAP_DXFMT_BC4_UNORM                   = 242,

   SVGA3D_DEVCAP_DXFMT_BC5_UNORM                   = 243,



   /*

    * Advertises shaderModel 4.1 support, independent blend-states,

    * cube-map arrays, and a higher vertex input registers limit.

    *

    * (See documentation on SVGA3D_DEVCAP_DX_MAX_VERTEXBUFFERS.)

    */

   SVGA3D_DEVCAP_SM41                              = 244,



   SVGA3D_DEVCAP_MULTISAMPLE_2X                    = 245,

   SVGA3D_DEVCAP_MULTISAMPLE_4X                    = 246,



   SVGA3D_DEVCAP_MAX                       /* This must be the last index. */

} SVGA3dDevCapIndex;
@@ -420,9 +457,7 @@ typedef enum { 
 * MIPS: Does the format support mip levels?

 * ARRAY: Does the format support texture arrays?

 * VOLUME: Does the format support having volume?

 * MULTISAMPLE_2: Does the format support 2x multisample?

 * MULTISAMPLE_4: Does the format support 4x multisample?

 * MULTISAMPLE_8: Does the format support 8x multisample?

 * MULTISAMPLE: Does the format support multisample?

 */

#define SVGA3D_DXFMT_SUPPORTED                (1 <<  0)

#define SVGA3D_DXFMT_SHADER_SAMPLE            (1 <<  1)
@@ -433,20 +468,8 @@ typedef enum { 
#define SVGA3D_DXFMT_ARRAY                    (1 <<  6)

#define SVGA3D_DXFMT_VOLUME                   (1 <<  7)

#define SVGA3D_DXFMT_DX_VERTEX_BUFFER         (1 <<  8)

#define SVGADX_DXFMT_MULTISAMPLE_2            (1 <<  9)

#define SVGADX_DXFMT_MULTISAMPLE_4            (1 << 10)

#define SVGADX_DXFMT_MULTISAMPLE_8            (1 << 11)

#define SVGADX_DXFMT_MAX                      (1 << 12)



/*

 * Convenience mask for any multisample capability.

 *

 * The multisample bits imply both load and render capability.

 */

#define SVGA3D_DXFMT_MULTISAMPLE ( \

           SVGADX_DXFMT_MULTISAMPLE_2 | \

           SVGADX_DXFMT_MULTISAMPLE_4 | \

           SVGADX_DXFMT_MULTISAMPLE_8 )

#define SVGA3D_DXFMT_MULTISAMPLE              (1 <<  9)

#define SVGA3D_DXFMT_MAX                      (1 << 10)



typedef union {

   Bool   b;

drivers/gpu/drm/vmwgfx/device_include/svga3d_dx.h

+222 −75

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drivers/gpu/drm/vmwgfx/device_include/svga3d_limits.h

+3 −1
Original line number Diff line number Diff line
@@ -63,7 +63,9 @@ 
 * Maximum size in dwords of shader text the SVGA device will allow.

 * Currently 8 MB.

 */

#define SVGA3D_MAX_SHADER_MEMORY  (8 * 1024 * 1024 / sizeof(uint32))

#define SVGA3D_MAX_SHADER_MEMORY_BYTES (8 * 1024 * 1024)

#define SVGA3D_MAX_SHADER_MEMORY  (SVGA3D_MAX_SHADER_MEMORY_BYTES / \

                                   sizeof(uint32))



#define SVGA3D_MAX_CLIP_PLANES    6

drivers/gpu/drm/vmwgfx/device_include/svga3d_surfacedefs.h

+630 −460

File changed.

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