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Commit b75f3845 authored by Elaine Zhang's avatar Elaine Zhang Committed by Heiko Stuebner
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clk: rockchip: add some critical clocks for rv1108 SoC 



the bus/periph/nclk_ddrupctl/pclk_ddrmon/pclk_acodecphy/pclk_pmu
no driver to handle them,
Chip design requirements for these clock to always on.

Signed-off-by: default avatarElaine Zhang <zhangqing@rock-chips.com>
Signed-off-by: default avatarHeiko Stuebner <heiko@sntech.de>
parent a52394e9

drivers/clk/rockchip/clk-rv1108.c

+7 −1
Original line number Diff line number Diff line
@@ -776,10 +776,16 @@ static struct rockchip_clk_branch rv1108_clk_branches[] __initdata = { 


static const char *const rv1108_critical_clocks[] __initconst = {

	"aclk_core",

	"aclk_bus_src_gpll",

	"aclk_bus",

	"hclk_bus",

	"pclk_bus",

	"aclk_periph",

	"hclk_periph",

	"pclk_periph",

	"nclk_ddrupctl",

	"pclk_ddrmon",

	"pclk_acodecphy",

	"pclk_pmu",

};



static void __init rv1108_clk_init(struct device_node *np)