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Commit b6ce068a authored by Matthew Wilcox's avatar Matthew Wilcox Committed by Linus Torvalds
Browse files

Change pci_raw_ops to pci_raw_read/write 



We want to allow different implementations of pci_raw_ops for standard
and extended config space on x86.  Rather than clutter generic code with
knowledge of this, we make pci_raw_ops private to x86 and use it to
implement the new raw interface -- raw_pci_read() and raw_pci_write().

Signed-off-by: default avatarMatthew Wilcox <willy@linux.intel.com>
Signed-off-by: default avatarLinus Torvalds <torvalds@linux-foundation.org>
parent a0ca9909

arch/ia64/pci/pci.c

+8 −17
Original line number Diff line number Diff line
@@ -43,8 +43,7 @@ 
#define PCI_SAL_EXT_ADDRESS(seg, bus, devfn, reg)	\

	(((u64) seg << 28) | (bus << 20) | (devfn << 12) | (reg))



static int

pci_sal_read (unsigned int seg, unsigned int bus, unsigned int devfn,

int raw_pci_read(unsigned int seg, unsigned int bus, unsigned int devfn,

	      int reg, int len, u32 *value)

{

	u64 addr, data = 0;
@@ -68,8 +67,7 @@ pci_sal_read (unsigned int seg, unsigned int bus, unsigned int devfn, 
	return 0;

}



static int

pci_sal_write (unsigned int seg, unsigned int bus, unsigned int devfn,

int raw_pci_write(unsigned int seg, unsigned int bus, unsigned int devfn,

	       int reg, int len, u32 value)

{

	u64 addr;
@@ -91,24 +89,17 @@ pci_sal_write (unsigned int seg, unsigned int bus, unsigned int devfn, 
	return 0;

}



static struct pci_raw_ops pci_sal_ops = {

	.read =		pci_sal_read,

	.write =	pci_sal_write

};



struct pci_raw_ops *raw_pci_ops = &pci_sal_ops;



static int

pci_read (struct pci_bus *bus, unsigned int devfn, int where, int size, u32 *value)

static int pci_read(struct pci_bus *bus, unsigned int devfn, int where,

							int size, u32 *value)

{

	return raw_pci_ops->read(pci_domain_nr(bus), bus->number,

	return raw_pci_read(pci_domain_nr(bus), bus->number,

				 devfn, where, size, value);

}



static int

pci_write (struct pci_bus *bus, unsigned int devfn, int where, int size, u32 value)

static int pci_write(struct pci_bus *bus, unsigned int devfn, int where,

							int size, u32 value)

{

	return raw_pci_ops->write(pci_domain_nr(bus), bus->number,

	return raw_pci_write(pci_domain_nr(bus), bus->number,

				  devfn, where, size, value);

}

arch/ia64/sn/pci/tioce_provider.c

+8 −8
Original line number Diff line number Diff line
@@ -752,13 +752,13 @@ tioce_kern_init(struct tioce_common *tioce_common) 
	 * Determine the secondary bus number of the port2 logical PPB.

	 * This is used to decide whether a given pci device resides on

	 * port1 or port2.  Note:  We don't have enough plumbing set up

	 * here to use pci_read_config_xxx() so use the raw_pci_ops vector.

	 * here to use pci_read_config_xxx() so use raw_pci_read().

	 */



	seg = tioce_common->ce_pcibus.bs_persist_segment;

	bus = tioce_common->ce_pcibus.bs_persist_busnum;



	raw_pci_ops->read(seg, bus, PCI_DEVFN(2, 0), PCI_SECONDARY_BUS, 1,&tmp);

	raw_pci_read(seg, bus, PCI_DEVFN(2, 0), PCI_SECONDARY_BUS, 1,&tmp);

	tioce_kern->ce_port1_secondary = (u8) tmp;



	/*
@@ -799,11 +799,11 @@ tioce_kern_init(struct tioce_common *tioce_common) 


		/* mem base/limit */



		raw_pci_ops->read(seg, bus, PCI_DEVFN(dev, 0),

		raw_pci_read(seg, bus, PCI_DEVFN(dev, 0),

				  PCI_MEMORY_BASE, 2, &tmp);

		base = (u64)tmp << 16;



		raw_pci_ops->read(seg, bus, PCI_DEVFN(dev, 0),

		raw_pci_read(seg, bus, PCI_DEVFN(dev, 0),

				  PCI_MEMORY_LIMIT, 2, &tmp);

		limit = (u64)tmp << 16;

		limit |= 0xfffffUL;
@@ -817,21 +817,21 @@ tioce_kern_init(struct tioce_common *tioce_common) 
		 * attributes.

		 */



		raw_pci_ops->read(seg, bus, PCI_DEVFN(dev, 0),

		raw_pci_read(seg, bus, PCI_DEVFN(dev, 0),

				  PCI_PREF_MEMORY_BASE, 2, &tmp);

		base = ((u64)tmp & PCI_PREF_RANGE_MASK) << 16;



		raw_pci_ops->read(seg, bus, PCI_DEVFN(dev, 0),

		raw_pci_read(seg, bus, PCI_DEVFN(dev, 0),

				  PCI_PREF_BASE_UPPER32, 4, &tmp);

		base |= (u64)tmp << 32;



		raw_pci_ops->read(seg, bus, PCI_DEVFN(dev, 0),

		raw_pci_read(seg, bus, PCI_DEVFN(dev, 0),

				  PCI_PREF_MEMORY_LIMIT, 2, &tmp);



		limit = ((u64)tmp & PCI_PREF_RANGE_MASK) << 16;

		limit |= 0xfffffUL;



		raw_pci_ops->read(seg, bus, PCI_DEVFN(dev, 0),

		raw_pci_read(seg, bus, PCI_DEVFN(dev, 0),

				  PCI_PREF_LIMIT_UPPER32, 4, &tmp);

		limit |= (u64)tmp << 32;

arch/x86/kernel/quirks.c

+1 −1
Original line number Diff line number Diff line
@@ -27,7 +27,7 @@ static void __devinit quirk_intel_irqbalance(struct pci_dev *dev) 
	pci_write_config_byte(dev, 0xf4, config|0x2);



	/* read xTPR register */

	raw_pci_ops->read(0, 0, 0x40, 0x4c, 2, &word);

	raw_pci_read(0, 0, 0x40, 0x4c, 2, &word);



	if (!(word & (1 << 13))) {

		dev_info(&dev->dev, "Intel E7520/7320/7525 detected; "

arch/x86/pci/common.c

+23 −2
Original line number Diff line number Diff line
@@ -26,16 +26,37 @@ int pcibios_last_bus = -1; 
unsigned long pirq_table_addr;

struct pci_bus *pci_root_bus;

struct pci_raw_ops *raw_pci_ops;

struct pci_raw_ops *raw_pci_ext_ops;



int raw_pci_read(unsigned int domain, unsigned int bus, unsigned int devfn,

						int reg, int len, u32 *val)

{

	if (reg < 256 && raw_pci_ops)

		return raw_pci_ops->read(domain, bus, devfn, reg, len, val);

	if (raw_pci_ext_ops)

		return raw_pci_ext_ops->read(domain, bus, devfn, reg, len, val);

	return -EINVAL;

}



int raw_pci_write(unsigned int domain, unsigned int bus, unsigned int devfn,

						int reg, int len, u32 val)

{

	if (reg < 256 && raw_pci_ops)

		return raw_pci_ops->write(domain, bus, devfn, reg, len, val);

	if (raw_pci_ext_ops)

		return raw_pci_ext_ops->write(domain, bus, devfn, reg, len, val);

	return -EINVAL;

}



static int pci_read(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 *value)

{

	return raw_pci_ops->read(pci_domain_nr(bus), bus->number,

	return raw_pci_read(pci_domain_nr(bus), bus->number,

				 devfn, where, size, value);

}



static int pci_write(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 value)

{

	return raw_pci_ops->write(pci_domain_nr(bus), bus->number,

	return raw_pci_write(pci_domain_nr(bus), bus->number,

				  devfn, where, size, value);

}

arch/x86/pci/direct.c

+2 −2
Original line number Diff line number Diff line
@@ -14,7 +14,7 @@ 
#define PCI_CONF1_ADDRESS(bus, devfn, reg) \

	(0x80000000 | (bus << 16) | (devfn << 8) | (reg & ~3))



int pci_conf1_read(unsigned int seg, unsigned int bus,

static int pci_conf1_read(unsigned int seg, unsigned int bus,

			  unsigned int devfn, int reg, int len, u32 *value)

{

	unsigned long flags;
@@ -45,7 +45,7 @@ int pci_conf1_read(unsigned int seg, unsigned int bus, 
	return 0;

}



int pci_conf1_write(unsigned int seg, unsigned int bus,

static int pci_conf1_write(unsigned int seg, unsigned int bus,

			   unsigned int devfn, int reg, int len, u32 value)

{

	unsigned long flags;