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Commit b69bad75 authored by Arnd Bergmann's avatar Arnd Bergmann
Browse files

Merge tag 'arm-soc/for-4.12/soc' of http://github.com/Broadcom/stblinux into next/soc

Pull "Broadcom soc changes for 4.12" from Florian Fainelli:

This pull request contains Broadcom ARM-based SoC Kconfig/platform changes for
4.12, please pull the following:

- Al enables ZONE_DMA for BRCMSTB platforms since a bunch of on-chip
  peripherals such as USB (OHCI and EHCI) and SDHCI cannot support physical
  addresses > 32-bit. This is only required when ARM_LPAE is enabled

- Danesh enables ARCH_HAS_HOLES_MEMORYMODEL in order for the kernel to provide
  a pfn_valid() implementation despite BRCMSTB enabling the SPARSEMEM model by
  default.

- Florian adds support for a new 28nm generation chip: 7260 by updating the
  runtime detection UART debuggin stub used for DEBUG_LL.

* tag 'arm-soc/for-4.12/soc' of http://github.com/Broadcom/stblinux:
  ARM: brcmstb: Add entry for 7260
  ARM: brcmstb: Enable ARCH_HAS_HOLES_MEMORYMODEL
  ARM: brcmstb: Enable ZONE_DMA for non 64-bit capable peripherals
parents 88f31b1d d47b51ad
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+10 −8
Original line number Diff line number Diff line
@@ -22,7 +22,8 @@

#define UARTA_3390		REG_PHYS_ADDR(0x40a900)
#define UARTA_7250		REG_PHYS_ADDR(0x40b400)
#define UARTA_7268		REG_PHYS_ADDR(0x40c000)
#define UARTA_7260		REG_PHYS_ADDR(0x40c000)
#define UARTA_7268		UARTA_7260
#define UARTA_7271		UARTA_7268
#define UARTA_7364		REG_PHYS_ADDR(0x40b000)
#define UARTA_7366		UARTA_7364
@@ -62,13 +63,14 @@
		/* Chip specific detection starts here */
20:		checkuart(\rp, \rv, 0x33900000, 3390)
21:		checkuart(\rp, \rv, 0x72500000, 7250)
22:		checkuart(\rp, \rv, 0x72680000, 7268)
23:		checkuart(\rp, \rv, 0x72710000, 7271)
24:		checkuart(\rp, \rv, 0x73640000, 7364)
25:		checkuart(\rp, \rv, 0x73660000, 7366)
26:		checkuart(\rp, \rv, 0x07437100, 74371)
27:		checkuart(\rp, \rv, 0x74390000, 7439)
28:		checkuart(\rp, \rv, 0x74450000, 7445)
22:		checkuart(\rp, \rv, 0x72600000, 7260)
23:		checkuart(\rp, \rv, 0x72680000, 7268)
24:		checkuart(\rp, \rv, 0x72710000, 7271)
25:		checkuart(\rp, \rv, 0x73640000, 7364)
26:		checkuart(\rp, \rv, 0x73660000, 7366)
27:		checkuart(\rp, \rv, 0x07437100, 74371)
28:		checkuart(\rp, \rv, 0x74390000, 7439)
29:		checkuart(\rp, \rv, 0x74450000, 7445)

		/* No valid UART found */
90:		mov	\rp, #0
+2 −0
Original line number Diff line number Diff line
@@ -198,7 +198,9 @@ config ARCH_BRCMSTB
	select HAVE_ARM_ARCH_TIMER
	select BRCMSTB_L2_IRQ
	select BCM7120_L2_IRQ
	select ARCH_HAS_HOLES_MEMORYMODEL
	select ARCH_DMA_ADDR_T_64BIT if ARM_LPAE
	select ZONE_DMA if ARM_LPAE
	select SOC_BRCMSTB
	select SOC_BUS
	help