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Commit b6333531 authored by David S. Miller's avatar David S. Miller
Browse files

Merge git://git.kernel.org/pub/scm/linux/kernel/git/davem/net 



Conflicts:
	drivers/net/phy/bcm7xxx.c
	drivers/net/phy/marvell.c
	drivers/net/vxlan.c

All three conflicts were cases of simple overlapping changes.

Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parents b1d95ae5 dea08e60

Documentation/cgroup-v2.txt

+5 −1
Original line number Diff line number Diff line
@@ -7,7 +7,7 @@ This is the authoritative documentation on the design, interface and 
conventions of cgroup v2.  It describes all userland-visible aspects

of cgroup including core and specific controller behaviors.  All

future changes must be reflected in this document.  Documentation for

v1 is available under Documentation/cgroup-legacy/.

v1 is available under Documentation/cgroup-v1/.



CONTENTS
@@ -843,6 +843,10 @@ PAGE_SIZE multiple when read back. 
		Amount of memory used to cache filesystem data,

		including tmpfs and shared memory.



	  sock



		Amount of memory used in network transmission buffers



	  file_mapped



		Amount of cached filesystem data mapped with mmap()

Documentation/devicetree/bindings/clock/rockchip,rk3036-cru.txt

+1 −1
Original line number Diff line number Diff line
@@ -30,7 +30,7 @@ that they are defined using standard clock bindings with following 
clock-output-names:

 - "xin24m" - crystal input - required,

 - "ext_i2s" - external I2S clock - optional,

 - "ext_gmac" - external GMAC clock - optional

 - "rmii_clkin" - external EMAC clock - optional



Example: Clock controller node:

Documentation/devicetree/bindings/interrupt-controller/arm,gic-v3.txt

+2 −3
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@@ -24,9 +24,8 @@ Main node required properties: 
		1 = edge triggered

		4 = level triggered



  Cells 4 and beyond are reserved for future use. When the 1st cell

  has a value of 0 or 1, cells 4 and beyond act as padding, and may be

  ignored. It is recommended that padding cells have a value of 0.

  Cells 4 and beyond are reserved for future use and must have a value

  of 0 if present.



- reg : Specifies base physical address(s) and size of the GIC

  registers, in the following order:

Documentation/devicetree/bindings/net/renesas,ravb.txt

+2 −2
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@@ -82,8 +82,8 @@ Example: 
				  "ch16", "ch17", "ch18", "ch19",

				  "ch20", "ch21", "ch22", "ch23",

				  "ch24";

		clocks = <&mstp8_clks R8A7795_CLK_ETHERAVB>;

		power-domains = <&cpg_clocks>;

		clocks = <&cpg CPG_MOD 812>;

		power-domains = <&cpg>;

		phy-mode = "rgmii-id";

		phy-handle = <&phy0>;

Documentation/devicetree/bindings/pci/pci-rcar-gen2.txt

+1 −0
Original line number Diff line number Diff line
@@ -8,6 +8,7 @@ OHCI and EHCI controllers. 
Required properties:

- compatible: "renesas,pci-r8a7790" for the R8A7790 SoC;

	      "renesas,pci-r8a7791" for the R8A7791 SoC;

	      "renesas,pci-r8a7793" for the R8A7793 SoC;

	      "renesas,pci-r8a7794" for the R8A7794 SoC;

	      "renesas,pci-rcar-gen2" for a generic R-Car Gen2 compatible device