drm/i915: replace for_each_engine() (b4ac5afc) · Commits · e / devices / android_kernel_teracube_emerald

drivers/gpu/drm/i915/i915_debugfs.c

+22 −28

Original line number	Original line	Diff line number	Diff line
	@@ -398,11 +398,11 @@ static void print_batch_pool_stats(struct seq_file *m,
	struct drm_i915_gem_object *obj;		struct drm_i915_gem_object *obj;
	struct file_stats stats;		struct file_stats stats;
	struct intel_engine_cs *engine;		struct intel_engine_cs *engine;
	int i, j;		int j;

	memset(&stats, 0, sizeof(stats));		memset(&stats, 0, sizeof(stats));

	for_each_engine(engine, dev_priv, i) {		for_each_engine(engine, dev_priv) {
	for (j = 0; j < ARRAY_SIZE(engine->batch_pool.cache_list); j++) {		for (j = 0; j < ARRAY_SIZE(engine->batch_pool.cache_list); j++) {
	list_for_each_entry(obj,		list_for_each_entry(obj,
	&engine->batch_pool.cache_list[j],		&engine->batch_pool.cache_list[j],
	@@ -638,13 +638,13 @@ static int i915_gem_batch_pool_info(struct seq_file m, void data)
	struct drm_i915_gem_object *obj;		struct drm_i915_gem_object *obj;
	struct intel_engine_cs *engine;		struct intel_engine_cs *engine;
	int total = 0;		int total = 0;
	int ret, i, j;		int ret, j;

	ret = mutex_lock_interruptible(&dev->struct_mutex);		ret = mutex_lock_interruptible(&dev->struct_mutex);
	if (ret)		if (ret)
	return ret;		return ret;

	for_each_engine(engine, dev_priv, i) {		for_each_engine(engine, dev_priv) {
	for (j = 0; j < ARRAY_SIZE(engine->batch_pool.cache_list); j++) {		for (j = 0; j < ARRAY_SIZE(engine->batch_pool.cache_list); j++) {
	int count;		int count;

	@@ -682,14 +682,14 @@ static int i915_gem_request_info(struct seq_file m, void data)
	struct drm_i915_private *dev_priv = dev->dev_private;		struct drm_i915_private *dev_priv = dev->dev_private;
	struct intel_engine_cs *engine;		struct intel_engine_cs *engine;
	struct drm_i915_gem_request *req;		struct drm_i915_gem_request *req;
	int ret, any, i;		int ret, any;

	ret = mutex_lock_interruptible(&dev->struct_mutex);		ret = mutex_lock_interruptible(&dev->struct_mutex);
	if (ret)		if (ret)
	return ret;		return ret;

	any = 0;		any = 0;
	for_each_engine(engine, dev_priv, i) {		for_each_engine(engine, dev_priv) {
	int count;		int count;

	count = 0;		count = 0;
	@@ -739,14 +739,14 @@ static int i915_gem_seqno_info(struct seq_file m, void data)
	struct drm_device *dev = node->minor->dev;		struct drm_device *dev = node->minor->dev;
	struct drm_i915_private *dev_priv = dev->dev_private;		struct drm_i915_private *dev_priv = dev->dev_private;
	struct intel_engine_cs *engine;		struct intel_engine_cs *engine;
	int ret, i;		int ret;

	ret = mutex_lock_interruptible(&dev->struct_mutex);		ret = mutex_lock_interruptible(&dev->struct_mutex);
	if (ret)		if (ret)
	return ret;		return ret;
	intel_runtime_pm_get(dev_priv);		intel_runtime_pm_get(dev_priv);

	for_each_engine(engine, dev_priv, i)		for_each_engine(engine, dev_priv)
	i915_ring_seqno_info(m, engine);		i915_ring_seqno_info(m, engine);

	intel_runtime_pm_put(dev_priv);		intel_runtime_pm_put(dev_priv);
	@@ -933,7 +933,7 @@ static int i915_interrupt_info(struct seq_file m, void data)
	seq_printf(m, "Graphics Interrupt mask: %08x\n",		seq_printf(m, "Graphics Interrupt mask: %08x\n",
	I915_READ(GTIMR));		I915_READ(GTIMR));
	}		}
	for_each_engine(engine, dev_priv, i) {		for_each_engine(engine, dev_priv) {
	if (INTEL_INFO(dev)->gen >= 6) {		if (INTEL_INFO(dev)->gen >= 6) {
	seq_printf(m,		seq_printf(m,
	"Graphics Interrupt mask (%s): %08x\n",		"Graphics Interrupt mask (%s): %08x\n",
	@@ -2044,7 +2044,7 @@ static int i915_dump_lrc(struct seq_file m, void unused)
	struct drm_i915_private *dev_priv = dev->dev_private;		struct drm_i915_private *dev_priv = dev->dev_private;
	struct intel_engine_cs *engine;		struct intel_engine_cs *engine;
	struct intel_context *ctx;		struct intel_context *ctx;
	int ret, i;		int ret;

	if (!i915.enable_execlists) {		if (!i915.enable_execlists) {
	seq_printf(m, "Logical Ring Contexts are disabled\n");		seq_printf(m, "Logical Ring Contexts are disabled\n");
	@@ -2057,7 +2057,7 @@ static int i915_dump_lrc(struct seq_file m, void unused)

	list_for_each_entry(ctx, &dev_priv->context_list, link)		list_for_each_entry(ctx, &dev_priv->context_list, link)
	if (ctx != dev_priv->kernel_context)		if (ctx != dev_priv->kernel_context)
	for_each_engine(engine, dev_priv, i)		for_each_engine(engine, dev_priv)
	i915_dump_lrc_obj(m, ctx, engine);		i915_dump_lrc_obj(m, ctx, engine);

	mutex_unlock(&dev->struct_mutex);		mutex_unlock(&dev->struct_mutex);
	@@ -2077,8 +2077,7 @@ static int i915_execlists(struct seq_file m, void data)
	u32 status;		u32 status;
	u32 ctx_id;		u32 ctx_id;
	struct list_head *cursor;		struct list_head *cursor;
	int ring_id, i;		int i, ret;
	int ret;

	if (!i915.enable_execlists) {		if (!i915.enable_execlists) {
	seq_puts(m, "Logical Ring Contexts are disabled\n");		seq_puts(m, "Logical Ring Contexts are disabled\n");
	@@ -2091,7 +2090,7 @@ static int i915_execlists(struct seq_file m, void data)

	intel_runtime_pm_get(dev_priv);		intel_runtime_pm_get(dev_priv);

	for_each_engine(engine, dev_priv, ring_id) {		for_each_engine(engine, dev_priv) {
	struct drm_i915_gem_request *head_req = NULL;		struct drm_i915_gem_request *head_req = NULL;
	int count = 0;		int count = 0;
	unsigned long flags;		unsigned long flags;
	@@ -2250,12 +2249,12 @@ static void gen8_ppgtt_info(struct seq_file m, struct drm_device dev)
	struct drm_i915_private *dev_priv = dev->dev_private;		struct drm_i915_private *dev_priv = dev->dev_private;
	struct intel_engine_cs *engine;		struct intel_engine_cs *engine;
	struct i915_hw_ppgtt *ppgtt = dev_priv->mm.aliasing_ppgtt;		struct i915_hw_ppgtt *ppgtt = dev_priv->mm.aliasing_ppgtt;
	int unused, i;		int i;

	if (!ppgtt)		if (!ppgtt)
	return;		return;

	for_each_engine(engine, dev_priv, unused) {		for_each_engine(engine, dev_priv) {
	seq_printf(m, "%s\n", engine->name);		seq_printf(m, "%s\n", engine->name);
	for (i = 0; i < 4; i++) {		for (i = 0; i < 4; i++) {
	u64 pdp = I915_READ(GEN8_RING_PDP_UDW(engine, i));		u64 pdp = I915_READ(GEN8_RING_PDP_UDW(engine, i));
	@@ -2270,12 +2269,11 @@ static void gen6_ppgtt_info(struct seq_file m, struct drm_device dev)
	{		{
	struct drm_i915_private *dev_priv = dev->dev_private;		struct drm_i915_private *dev_priv = dev->dev_private;
	struct intel_engine_cs *engine;		struct intel_engine_cs *engine;
	int i;

	if (INTEL_INFO(dev)->gen == 6)		if (INTEL_INFO(dev)->gen == 6)
	seq_printf(m, "GFX_MODE: 0x%08x\n", I915_READ(GFX_MODE));		seq_printf(m, "GFX_MODE: 0x%08x\n", I915_READ(GFX_MODE));

	for_each_engine(engine, dev_priv, i) {		for_each_engine(engine, dev_priv) {
	seq_printf(m, "%s\n", engine->name);		seq_printf(m, "%s\n", engine->name);
	if (INTEL_INFO(dev)->gen == 7)		if (INTEL_INFO(dev)->gen == 7)
	seq_printf(m, "GFX_MODE: 0x%08x\n",		seq_printf(m, "GFX_MODE: 0x%08x\n",
	@@ -2342,9 +2340,8 @@ static int count_irq_waiters(struct drm_i915_private *i915)
	{		{
	struct intel_engine_cs *engine;		struct intel_engine_cs *engine;
	int count = 0;		int count = 0;
	int i;

	for_each_engine(engine, i915, i)		for_each_engine(engine, i915)
	count += engine->irq_refcount;		count += engine->irq_refcount;

	return count;		return count;
	@@ -2455,7 +2452,6 @@ static void i915_guc_client_info(struct seq_file *m,
	{		{
	struct intel_engine_cs *engine;		struct intel_engine_cs *engine;
	uint64_t tot = 0;		uint64_t tot = 0;
	uint32_t i;

	seq_printf(m, "\tPriority %d, GuC ctx index: %u, PD offset 0x%x\n",		seq_printf(m, "\tPriority %d, GuC ctx index: %u, PD offset 0x%x\n",
	client->priority, client->ctx_index, client->proc_desc_offset);		client->priority, client->ctx_index, client->proc_desc_offset);
	@@ -2468,7 +2464,7 @@ static void i915_guc_client_info(struct seq_file *m,
	seq_printf(m, "\tFailed doorbell: %u\n", client->b_fail);		seq_printf(m, "\tFailed doorbell: %u\n", client->b_fail);
	seq_printf(m, "\tLast submission result: %d\n", client->retcode);		seq_printf(m, "\tLast submission result: %d\n", client->retcode);

	for_each_engine(engine, dev_priv, i) {		for_each_engine(engine, dev_priv) {
	seq_printf(m, "\tSubmissions: %llu %s\n",		seq_printf(m, "\tSubmissions: %llu %s\n",
	client->submissions[engine->guc_id],		client->submissions[engine->guc_id],
	engine->name);		engine->name);
	@@ -2485,7 +2481,6 @@ static int i915_guc_info(struct seq_file m, void data)
	struct intel_guc guc;		struct intel_guc guc;
	struct i915_guc_client client = {};		struct i915_guc_client client = {};
	struct intel_engine_cs *engine;		struct intel_engine_cs *engine;
	enum intel_engine_id i;
	u64 total = 0;		u64 total = 0;

	if (!HAS_GUC_SCHED(dev_priv->dev))		if (!HAS_GUC_SCHED(dev_priv->dev))
	@@ -2508,7 +2503,7 @@ static int i915_guc_info(struct seq_file m, void data)
	seq_printf(m, "GuC last action error code: %d\n", guc.action_err);		seq_printf(m, "GuC last action error code: %d\n", guc.action_err);

	seq_printf(m, "\nGuC submissions:\n");		seq_printf(m, "\nGuC submissions:\n");
	for_each_engine(engine, dev_priv, i) {		for_each_engine(engine, dev_priv) {
	seq_printf(m, "\t%-24s: %10llu, last seqno 0x%08x\n",		seq_printf(m, "\t%-24s: %10llu, last seqno 0x%08x\n",
	engine->name, guc.submissions[engine->guc_id],		engine->name, guc.submissions[engine->guc_id],
	guc.last_seqno[engine->guc_id]);		guc.last_seqno[engine->guc_id]);
	@@ -3181,7 +3176,7 @@ static int i915_semaphore_status(struct seq_file m, void unused)
	kunmap_atomic(seqno);		kunmap_atomic(seqno);
	} else {		} else {
	seq_puts(m, " Last signal:");		seq_puts(m, " Last signal:");
	for_each_engine(engine, dev_priv, id)		for_each_engine(engine, dev_priv)
	for (j = 0; j < num_rings; j++)		for (j = 0; j < num_rings; j++)
	seq_printf(m, "0x%08x\n",		seq_printf(m, "0x%08x\n",
	I915_READ(engine->semaphore.mbox.signal[j]));		I915_READ(engine->semaphore.mbox.signal[j]));
	@@ -3189,11 +3184,10 @@ static int i915_semaphore_status(struct seq_file m, void unused)
	}		}

	seq_puts(m, "\nSync seqno:\n");		seq_puts(m, "\nSync seqno:\n");
	for_each_engine(engine, dev_priv, id) {		for_each_engine(engine, dev_priv) {
	for (j = 0; j < num_rings; j++) {		for (j = 0; j < num_rings; j++)
	seq_printf(m, " 0x%08x ",		seq_printf(m, " 0x%08x ",
	engine->semaphore.sync_seqno[j]);		engine->semaphore.sync_seqno[j]);
	}
	seq_putc(m, '\n');		seq_putc(m, '\n');
	}		}
	seq_putc(m, '\n');		seq_putc(m, '\n');

drivers/gpu/drm/i915/i915_drv.h

+11 −6

Original line number	Original line	Diff line number	Diff line
	@@ -1990,10 +1990,12 @@ static inline struct drm_i915_private guc_to_i915(struct intel_guc guc)
	return container_of(guc, struct drm_i915_private, guc);		return container_of(guc, struct drm_i915_private, guc);
	}		}

	/* Iterate over initialised rings */		/* Simple iterator over all initialised engines */
	#define for_each_engine(ring__, dev_priv__, i__) \		#define for_each_engine(engine__, dev_priv__) \
	for ((i__) = 0; (i__) < I915_NUM_ENGINES; (i__)++) \		for ((engine__) = &(dev_priv__)->engine[0]; \
	for_each_if ((((ring__) = &(dev_priv__)->engine[(i__)]), intel_engine_initialized((ring__))))		(engine__) < &(dev_priv__)->engine[I915_NUM_ENGINES]; \
			(engine__)++) \
			for_each_if (intel_engine_initialized(engine__))

	/* Iterator with engine_id */		/* Iterator with engine_id */
	#define for_each_engine_id(engine__, dev_priv__, id__) \		#define for_each_engine_id(engine__, dev_priv__, id__) \
	@@ -2005,8 +2007,11 @@ static inline struct drm_i915_private guc_to_i915(struct intel_guc guc)

	/* Iterator over subset of engines selected by mask */		/* Iterator over subset of engines selected by mask */
	#define for_each_engine_masked(engine__, dev_priv__, mask__) \		#define for_each_engine_masked(engine__, dev_priv__, mask__) \
	for ((engine__) = &dev_priv->engine[0]; (engine__) < &dev_priv->engine[I915_NUM_ENGINES]; (engine__)++) \		for ((engine__) = &(dev_priv__)->engine[0]; \
	for_each_if (intel_engine_flag((engine__)) & (mask__) && intel_engine_initialized((engine__)))		(engine__) < &(dev_priv__)->engine[I915_NUM_ENGINES]; \
			(engine__)++) \
			for_each_if (((mask__) & intel_engine_flag(engine__)) && \
			intel_engine_initialized(engine__))

	enum hdmi_force_audio {		enum hdmi_force_audio {
	HDMI_AUDIO_OFF_DVI = -2, /* no aux data for HDMI-DVI converter */		HDMI_AUDIO_OFF_DVI = -2, /* no aux data for HDMI-DVI converter */

drivers/gpu/drm/i915/i915_gem.c

+22 −28

Original line number	Original line	Diff line number	Diff line
	@@ -2466,10 +2466,10 @@ i915_gem_init_seqno(struct drm_device *dev, u32 seqno)
	{		{
	struct drm_i915_private *dev_priv = dev->dev_private;		struct drm_i915_private *dev_priv = dev->dev_private;
	struct intel_engine_cs *engine;		struct intel_engine_cs *engine;
	int ret, i, j;		int ret, j;

	/* Carefully retire all requests without writing to the rings */		/* Carefully retire all requests without writing to the rings */
	for_each_engine(engine, dev_priv, i) {		for_each_engine(engine, dev_priv) {
	ret = intel_engine_idle(engine);		ret = intel_engine_idle(engine);
	if (ret)		if (ret)
	return ret;		return ret;
	@@ -2477,7 +2477,7 @@ i915_gem_init_seqno(struct drm_device *dev, u32 seqno)
	i915_gem_retire_requests(dev);		i915_gem_retire_requests(dev);

	/* Finally reset hw state */		/* Finally reset hw state */
	for_each_engine(engine, dev_priv, i) {		for_each_engine(engine, dev_priv) {
	intel_ring_init_seqno(engine, seqno);		intel_ring_init_seqno(engine, seqno);

	for (j = 0; j < ARRAY_SIZE(engine->semaphore.sync_seqno); j++)		for (j = 0; j < ARRAY_SIZE(engine->semaphore.sync_seqno); j++)
	@@ -2884,17 +2884,16 @@ void i915_gem_reset(struct drm_device *dev)
	{		{
	struct drm_i915_private *dev_priv = dev->dev_private;		struct drm_i915_private *dev_priv = dev->dev_private;
	struct intel_engine_cs *engine;		struct intel_engine_cs *engine;
	int i;

	/*		/*
	* Before we free the objects from the requests, we need to inspect		* Before we free the objects from the requests, we need to inspect
	* them for finding the guilty party. As the requests only borrow		* them for finding the guilty party. As the requests only borrow
	* their reference to the objects, the inspection must be done first.		* their reference to the objects, the inspection must be done first.
	*/		*/
	for_each_engine(engine, dev_priv, i)		for_each_engine(engine, dev_priv)
	i915_gem_reset_engine_status(dev_priv, engine);		i915_gem_reset_engine_status(dev_priv, engine);

	for_each_engine(engine, dev_priv, i)		for_each_engine(engine, dev_priv)
	i915_gem_reset_engine_cleanup(dev_priv, engine);		i915_gem_reset_engine_cleanup(dev_priv, engine);

	i915_gem_context_reset(dev);		i915_gem_context_reset(dev);
	@@ -2962,9 +2961,8 @@ i915_gem_retire_requests(struct drm_device *dev)
	struct drm_i915_private *dev_priv = dev->dev_private;		struct drm_i915_private *dev_priv = dev->dev_private;
	struct intel_engine_cs *engine;		struct intel_engine_cs *engine;
	bool idle = true;		bool idle = true;
	int i;

	for_each_engine(engine, dev_priv, i) {		for_each_engine(engine, dev_priv) {
	i915_gem_retire_requests_ring(engine);		i915_gem_retire_requests_ring(engine);
	idle &= list_empty(&engine->request_list);		idle &= list_empty(&engine->request_list);
	if (i915.enable_execlists) {		if (i915.enable_execlists) {
	@@ -3009,24 +3007,20 @@ i915_gem_idle_work_handler(struct work_struct *work)
	struct drm_i915_private *dev_priv =		struct drm_i915_private *dev_priv =
	container_of(work, typeof(*dev_priv), mm.idle_work.work);		container_of(work, typeof(*dev_priv), mm.idle_work.work);
	struct drm_device *dev = dev_priv->dev;		struct drm_device *dev = dev_priv->dev;
	struct intel_engine_cs *ring;		struct intel_engine_cs *engine;
	int i;

	for_each_engine(ring, dev_priv, i)		for_each_engine(engine, dev_priv)
	if (!list_empty(&ring->request_list))		if (!list_empty(&engine->request_list))
	return;		return;

	/* we probably should sync with hangcheck here, using cancel_work_sync.		/* we probably should sync with hangcheck here, using cancel_work_sync.
	* Also locking seems to be fubar here, ring->request_list is protected		* Also locking seems to be fubar here, engine->request_list is protected
	* by dev->struct_mutex. */		* by dev->struct_mutex. */

	intel_mark_idle(dev);		intel_mark_idle(dev);

	if (mutex_trylock(&dev->struct_mutex)) {		if (mutex_trylock(&dev->struct_mutex)) {
	struct intel_engine_cs *engine;		for_each_engine(engine, dev_priv)
	int i;

	for_each_engine(engine, dev_priv, i)
	i915_gem_batch_pool_fini(&engine->batch_pool);		i915_gem_batch_pool_fini(&engine->batch_pool);

	mutex_unlock(&dev->struct_mutex);		mutex_unlock(&dev->struct_mutex);
	@@ -3390,10 +3384,10 @@ int i915_gpu_idle(struct drm_device *dev)
	{		{
	struct drm_i915_private *dev_priv = dev->dev_private;		struct drm_i915_private *dev_priv = dev->dev_private;
	struct intel_engine_cs *engine;		struct intel_engine_cs *engine;
	int ret, i;		int ret;

	/* Flush everything onto the inactive list. */		/* Flush everything onto the inactive list. */
	for_each_engine(engine, dev_priv, i) {		for_each_engine(engine, dev_priv) {
	if (!i915.enable_execlists) {		if (!i915.enable_execlists) {
	struct drm_i915_gem_request *req;		struct drm_i915_gem_request *req;

	@@ -4655,9 +4649,8 @@ i915_gem_stop_engines(struct drm_device *dev)
	{		{
	struct drm_i915_private *dev_priv = dev->dev_private;		struct drm_i915_private *dev_priv = dev->dev_private;
	struct intel_engine_cs *engine;		struct intel_engine_cs *engine;
	int i;

	for_each_engine(engine, dev_priv, i)		for_each_engine(engine, dev_priv)
	dev_priv->gt.stop_engine(engine);		dev_priv->gt.stop_engine(engine);
	}		}

	@@ -4828,7 +4821,7 @@ i915_gem_init_hw(struct drm_device *dev)
	{		{
	struct drm_i915_private *dev_priv = dev->dev_private;		struct drm_i915_private *dev_priv = dev->dev_private;
	struct intel_engine_cs *engine;		struct intel_engine_cs *engine;
	int ret, i, j;		int ret, j;

	if (INTEL_INFO(dev)->gen < 6 && !intel_enable_gtt())		if (INTEL_INFO(dev)->gen < 6 && !intel_enable_gtt())
	return -EIO;		return -EIO;
	@@ -4874,7 +4867,7 @@ i915_gem_init_hw(struct drm_device *dev)
	}		}

	/* Need to do basic initialisation of all rings first: */		/* Need to do basic initialisation of all rings first: */
	for_each_engine(engine, dev_priv, i) {		for_each_engine(engine, dev_priv) {
	ret = engine->init_hw(engine);		ret = engine->init_hw(engine);
	if (ret)		if (ret)
	goto out;		goto out;
	@@ -4899,7 +4892,7 @@ i915_gem_init_hw(struct drm_device *dev)
	goto out;		goto out;

	/* Now it is safe to go back round and do everything else: */		/* Now it is safe to go back round and do everything else: */
	for_each_engine(engine, dev_priv, i) {		for_each_engine(engine, dev_priv) {
	struct drm_i915_gem_request *req;		struct drm_i915_gem_request *req;

	req = i915_gem_request_alloc(engine, NULL);		req = i915_gem_request_alloc(engine, NULL);
	@@ -4916,7 +4909,8 @@ i915_gem_init_hw(struct drm_device *dev)

	ret = i915_ppgtt_init_ring(req);		ret = i915_ppgtt_init_ring(req);
	if (ret && ret != -EIO) {		if (ret && ret != -EIO) {
	DRM_ERROR("PPGTT enable ring #%d failed %d\n", i, ret);		DRM_ERROR("PPGTT enable %s failed %d\n",
			engine->name, ret);
	i915_gem_request_cancel(req);		i915_gem_request_cancel(req);
	i915_gem_cleanup_engines(dev);		i915_gem_cleanup_engines(dev);
	goto out;		goto out;
	@@ -4924,7 +4918,8 @@ i915_gem_init_hw(struct drm_device *dev)

	ret = i915_gem_context_enable(req);		ret = i915_gem_context_enable(req);
	if (ret && ret != -EIO) {		if (ret && ret != -EIO) {
	DRM_ERROR("Context enable ring #%d failed %d\n", i, ret);		DRM_ERROR("Context enable %s failed %d\n",
			engine->name, ret);
	i915_gem_request_cancel(req);		i915_gem_request_cancel(req);
	i915_gem_cleanup_engines(dev);		i915_gem_cleanup_engines(dev);
	goto out;		goto out;
	@@ -5005,9 +5000,8 @@ i915_gem_cleanup_engines(struct drm_device *dev)
	{		{
	struct drm_i915_private *dev_priv = dev->dev_private;		struct drm_i915_private *dev_priv = dev->dev_private;
	struct intel_engine_cs *engine;		struct intel_engine_cs *engine;
	int i;

	for_each_engine(engine, dev_priv, i)		for_each_engine(engine, dev_priv)
	dev_priv->gt.cleanup_engine(engine);		dev_priv->gt.cleanup_engine(engine);

	if (i915.enable_execlists)		if (i915.enable_execlists)

drivers/gpu/drm/i915/i915_gem_context.c

+3 −3

Original line number	Original line	Diff line number	Diff line
	@@ -517,7 +517,7 @@ mi_set_context(struct drm_i915_gem_request *req, u32 hw_flags)
	i915_semaphore_is_enabled(engine->dev) ?		i915_semaphore_is_enabled(engine->dev) ?
	hweight32(INTEL_INFO(engine->dev)->ring_mask) - 1 :		hweight32(INTEL_INFO(engine->dev)->ring_mask) - 1 :
	0;		0;
	int len, i, ret;		int len, ret;

	/* w/a: If Flush TLB Invalidation Mode is enabled, driver must do a TLB		/* w/a: If Flush TLB Invalidation Mode is enabled, driver must do a TLB
	* invalidation prior to MI_SET_CONTEXT. On GEN6 we don't set the value		* invalidation prior to MI_SET_CONTEXT. On GEN6 we don't set the value
	@@ -553,7 +553,7 @@ mi_set_context(struct drm_i915_gem_request *req, u32 hw_flags)

	intel_ring_emit(engine,		intel_ring_emit(engine,
	MI_LOAD_REGISTER_IMM(num_rings));		MI_LOAD_REGISTER_IMM(num_rings));
	for_each_engine(signaller, to_i915(engine->dev), i) {		for_each_engine(signaller, to_i915(engine->dev)) {
	if (signaller == engine)		if (signaller == engine)
	continue;		continue;

	@@ -582,7 +582,7 @@ mi_set_context(struct drm_i915_gem_request *req, u32 hw_flags)

	intel_ring_emit(engine,		intel_ring_emit(engine,
	MI_LOAD_REGISTER_IMM(num_rings));		MI_LOAD_REGISTER_IMM(num_rings));
	for_each_engine(signaller, to_i915(engine->dev), i) {		for_each_engine(signaller, to_i915(engine->dev)) {
	if (signaller == engine)		if (signaller == engine)
	continue;		continue;

drivers/gpu/drm/i915/i915_gem_debug.c

+1 −2

Original line number	Original line	Diff line number	Diff line
	@@ -38,12 +38,11 @@ i915_verify_lists(struct drm_device *dev)
	struct drm_i915_gem_object *obj;		struct drm_i915_gem_object *obj;
	struct intel_engine_cs *engine;		struct intel_engine_cs *engine;
	int err = 0;		int err = 0;
	int i;

	if (warned)		if (warned)
	return 0;		return 0;

	for_each_engine(engine, dev_priv, i) {		for_each_engine(engine, dev_priv) {
	list_for_each_entry(obj, &engine->active_list,		list_for_each_entry(obj, &engine->active_list,
	engine_list[engine->id]) {		engine_list[engine->id]) {
	if (obj->base.dev != dev \|\|		if (obj->base.dev != dev \|\|