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Commit b4590047 authored by Dave Airlie's avatar Dave Airlie
Browse files

Merge branch 'exynos-drm-next' of... 

Merge branch 'exynos-drm-next' of git://git.kernel.org/pub/scm/linux/kernel/git/daeinki/drm-exynos into drm-next

   This pull request includes comprehensive cleanups to HDMI part and
   several fixups. In addition, this pull request includes also a defconfig
   patch which enables mixer driver as default. For this, I got already
   Acked-by from Krzysztof Kozlowski who is a Exynos SoC maintainer.

* 'exynos-drm-next' of git://git.kernel.org/pub/scm/linux/kernel/git/daeinki/drm-exynos: (34 commits)
  drm/exynos/gem: remove DMA-mapping hacks used for constructing page array
  ARM: exynos_defconfig: enable Exynos DRM Mixer driver
  drm/exynos: simplify Kconfig component names
  drm/exynos: re-arrange Kconfig entries
  drm/exynos: abstract out common dependency
  drm/exynos: separate Mixer and HDMI drivers
  drm/exynos/mixer: replace direct cross-driver call with drm mode validation
  drm/exynos: add atomic_check callback to exynos_crtc
  drm/exynos/decon5433: add support for DECON-TV
  drm/exynos/decon5433: remove duplicated initialization
  drm/exynos/decon5433: merge different flag fields
  drm/exynos/decon5433: add function to set particular register bits
  drm/exynos/decon5433: fix timing registers writes
  drm/exynos/decon5433: add PCLK clock
  drm/exynos: cleanup name of gem object for exynos_drm
  drm/exynos: fix to detach device of iommu
  drm/exynos: add cursor plane support
  drm/exynos: add global macro for the default primary plane
  drm/exynos: fix spelling errors
  drm: exynos: mixer: fix using usleep() in atomic context
  ...
parents c0f3f90c df547bf7

arch/arm/configs/exynos_defconfig

+1 −0
Original line number Diff line number Diff line
@@ -132,6 +132,7 @@ CONFIG_DRM_PARADE_PS8622=y 
CONFIG_DRM_EXYNOS=y

CONFIG_DRM_EXYNOS_FIMD=y

CONFIG_DRM_EXYNOS_DSI=y

CONFIG_DRM_EXYNOS_MIXER=y

CONFIG_DRM_EXYNOS_HDMI=y

CONFIG_DRM_PANEL_SIMPLE=y

CONFIG_DRM_PANEL_SAMSUNG_S6E8AA0=y

drivers/gpu/drm/exynos/Kconfig

+44 −31
Original line number Diff line number Diff line
@@ -11,43 +11,59 @@ config DRM_EXYNOS 
	  Choose this option if you have a Samsung SoC EXYNOS chipset.

	  If M is selected the module will be called exynosdrm.



if DRM_EXYNOS



config DRM_EXYNOS_IOMMU

	bool

	depends on DRM_EXYNOS && EXYNOS_IOMMU && ARM_DMA_USE_IOMMU

	depends on EXYNOS_IOMMU && ARM_DMA_USE_IOMMU

	default y



comment "CRTCs"



config DRM_EXYNOS_FIMD

	bool "Exynos DRM FIMD"

	depends on DRM_EXYNOS && !FB_S3C

	bool "FIMD"

	depends on !FB_S3C

	select FB_MODE_HELPERS

	select MFD_SYSCON

	help

	  Choose this option if you want to use Exynos FIMD for DRM.



config DRM_EXYNOS5433_DECON

	bool "Exynos5433 DRM DECON"

	depends on DRM_EXYNOS

	bool "DECON on Exynos5433"

	help

	  Choose this option if you want to use Exynos5433 DECON for DRM.



config DRM_EXYNOS7_DECON

	bool "Exynos7 DRM DECON"

	depends on DRM_EXYNOS && !FB_S3C

	bool "DECON on Exynos7"

	depends on !FB_S3C

	select FB_MODE_HELPERS

	help

	  Choose this option if you want to use Exynos DECON for DRM.



config DRM_EXYNOS_MIXER

	bool "Mixer"

	depends on !VIDEO_SAMSUNG_S5P_TV

	help

	  Choose this option if you want to use Exynos Mixer for DRM.



config DRM_EXYNOS_VIDI

	bool "Virtual Display"

	help

	  Choose this option if you want to use Exynos VIDI for DRM.



comment "Encoders and Bridges"



config DRM_EXYNOS_DPI

	bool "EXYNOS DRM parallel output support"

	depends on DRM_EXYNOS && (DRM_EXYNOS_FIMD || DRM_EXYNOS7_DECON)

	bool "Parallel output"

	depends on DRM_EXYNOS_FIMD

	select DRM_PANEL

	default n

	help

	  This enables support for Exynos parallel output.



config DRM_EXYNOS_DSI

	bool "EXYNOS DRM MIPI-DSI driver support"

	depends on DRM_EXYNOS && (DRM_EXYNOS_FIMD || DRM_EXYNOS5433_DECON || DRM_EXYNOS7_DECON)

	bool "MIPI-DSI host"

	depends on DRM_EXYNOS_FIMD || DRM_EXYNOS5433_DECON || DRM_EXYNOS7_DECON

	select DRM_MIPI_DSI

	select DRM_PANEL

	default n
@@ -55,58 +71,55 @@ config DRM_EXYNOS_DSI 
	  This enables support for Exynos MIPI-DSI device.



config DRM_EXYNOS_DP

	bool "EXYNOS DRM DP driver support"

	depends on DRM_EXYNOS && (DRM_EXYNOS_FIMD || DRM_EXYNOS7_DECON)

	bool "Display Port"

	depends on DRM_EXYNOS_FIMD || DRM_EXYNOS7_DECON

	default DRM_EXYNOS

	select DRM_PANEL

	help

	  This enables support for DP device.



config DRM_EXYNOS_HDMI

	bool "Exynos DRM HDMI"

	depends on DRM_EXYNOS && !VIDEO_SAMSUNG_S5P_TV

	bool "HDMI"

	depends on !VIDEO_SAMSUNG_S5P_TV && (DRM_EXYNOS_MIXER || DRM_EXYNOS5433_DECON)

	help

	  Choose this option if you want to use Exynos HDMI for DRM.



config DRM_EXYNOS_VIDI

	bool "Exynos DRM Virtual Display"

	depends on DRM_EXYNOS

config DRM_EXYNOS_MIC

	bool "Mobile Image Compressor"

	depends on DRM_EXYNOS5433_DECON

	help

	  Choose this option if you want to use Exynos VIDI for DRM.

	  Choose this option if you want to use Exynos MIC for DRM.



comment "Sub-drivers"



config DRM_EXYNOS_G2D

	bool "Exynos DRM G2D"

	depends on DRM_EXYNOS && !VIDEO_SAMSUNG_S5P_G2D

	bool "G2D"

	depends on !VIDEO_SAMSUNG_S5P_G2D

	select FRAME_VECTOR

	help

	  Choose this option if you want to use Exynos G2D for DRM.



config DRM_EXYNOS_IPP

	bool "Exynos DRM IPP"

	depends on DRM_EXYNOS

	bool "Image Post Processor"

	help

	  Choose this option if you want to use IPP feature for DRM.



config DRM_EXYNOS_FIMC

	bool "Exynos DRM FIMC"

	bool "FIMC"

	depends on DRM_EXYNOS_IPP && MFD_SYSCON

	help

	  Choose this option if you want to use Exynos FIMC for DRM.



config DRM_EXYNOS_ROTATOR

	bool "Exynos DRM Rotator"

	bool "Rotator"

	depends on DRM_EXYNOS_IPP

	help

	  Choose this option if you want to use Exynos Rotator for DRM.



config DRM_EXYNOS_GSC

	bool "Exynos DRM GSC"

	bool "GScaler"

	depends on DRM_EXYNOS_IPP && ARCH_EXYNOS5 && !ARCH_MULTIPLATFORM

	help

	  Choose this option if you want to use Exynos GSC for DRM.



config DRM_EXYNOS_MIC

	bool "Exynos DRM MIC"

	depends on (DRM_EXYNOS && DRM_EXYNOS5433_DECON)

	help

	  Choose this option if you want to use Exynos MIC for DRM.
 
endif

drivers/gpu/drm/exynos/Makefile

+2 −1
Original line number Diff line number Diff line
@@ -14,7 +14,8 @@ exynosdrm-$(CONFIG_DRM_EXYNOS7_DECON) += exynos7_drm_decon.o 
exynosdrm-$(CONFIG_DRM_EXYNOS_DPI)	+= exynos_drm_dpi.o

exynosdrm-$(CONFIG_DRM_EXYNOS_DSI)	+= exynos_drm_dsi.o

exynosdrm-$(CONFIG_DRM_EXYNOS_DP)	+= exynos_dp_core.o exynos_dp_reg.o

exynosdrm-$(CONFIG_DRM_EXYNOS_HDMI)	+= exynos_hdmi.o exynos_mixer.o

exynosdrm-$(CONFIG_DRM_EXYNOS_MIXER)	+= exynos_mixer.o

exynosdrm-$(CONFIG_DRM_EXYNOS_HDMI)	+= exynos_hdmi.o

exynosdrm-$(CONFIG_DRM_EXYNOS_VIDI)	+= exynos_drm_vidi.o

exynosdrm-$(CONFIG_DRM_EXYNOS_G2D)	+= exynos_drm_g2d.o

exynosdrm-$(CONFIG_DRM_EXYNOS_IPP)	+= exynos_drm_ipp.o

drivers/gpu/drm/exynos/exynos5433_drm_decon.c

+161 −163
Original line number Diff line number Diff line
@@ -13,6 +13,7 @@ 
#include <linux/platform_device.h>

#include <linux/clk.h>

#include <linux/component.h>

#include <linux/of_device.h>

#include <linux/of_gpio.h>

#include <linux/pm_runtime.h>
@@ -24,28 +25,11 @@ 
#include "exynos_drm_iommu.h"



#define WINDOWS_NR	3

#define CURSOR_WIN	2

#define MIN_FB_WIDTH_FOR_16WORD_BURST	128



struct decon_context {

	struct device			*dev;

	struct drm_device		*drm_dev;

	struct exynos_drm_crtc		*crtc;

	struct exynos_drm_plane		planes[WINDOWS_NR];

	void __iomem			*addr;

	struct clk			*clks[6];

	unsigned int			default_win;

	unsigned long			irq_flags;

	int				pipe;

	bool				suspended;



#define BIT_CLKS_ENABLED		0

#define BIT_IRQS_ENABLED		1

	unsigned long			enabled;

	bool				i80_if;

	atomic_t			win_updated;

};



static const char * const decon_clks_name[] = {

	"pclk",

	"aclk_decon",

	"aclk_smmu_decon0x",

	"aclk_xiu_decon0x",
@@ -54,6 +38,32 @@ static const char * const decon_clks_name[] = { 
	"sclk_decon_eclk",

};



enum decon_iftype {

	IFTYPE_RGB,

	IFTYPE_I80,

	IFTYPE_HDMI

};



enum decon_flag_bits {

	BIT_CLKS_ENABLED,

	BIT_IRQS_ENABLED,

	BIT_WIN_UPDATED,

	BIT_SUSPENDED

};



struct decon_context {

	struct device			*dev;

	struct drm_device		*drm_dev;

	struct exynos_drm_crtc		*crtc;

	struct exynos_drm_plane		planes[WINDOWS_NR];

	void __iomem			*addr;

	struct clk			*clks[ARRAY_SIZE(decon_clks_name)];

	int				pipe;

	unsigned long			flags;

	enum decon_iftype		out_type;

	int				first_win;

};



static const uint32_t decon_formats[] = {

	DRM_FORMAT_XRGB1555,

	DRM_FORMAT_RGB565,
@@ -61,17 +71,24 @@ static const uint32_t decon_formats[] = { 
	DRM_FORMAT_ARGB8888,

};



static inline void decon_set_bits(struct decon_context *ctx, u32 reg, u32 mask,

				  u32 val)

{

	val = (val & mask) | (readl(ctx->addr + reg) & ~mask);

	writel(val, ctx->addr + reg);

}



static int decon_enable_vblank(struct exynos_drm_crtc *crtc)

{

	struct decon_context *ctx = crtc->ctx;

	u32 val;



	if (ctx->suspended)

	if (test_bit(BIT_SUSPENDED, &ctx->flags))

		return -EPERM;



	if (test_and_set_bit(0, &ctx->irq_flags)) {

	if (test_and_set_bit(BIT_IRQS_ENABLED, &ctx->flags)) {

		val = VIDINTCON0_INTEN;

		if (ctx->i80_if)

		if (ctx->out_type == IFTYPE_I80)

			val |= VIDINTCON0_FRAMEDONE;

		else

			val |= VIDINTCON0_INTFRMEN;
@@ -86,79 +103,85 @@ static void decon_disable_vblank(struct exynos_drm_crtc *crtc) 
{

	struct decon_context *ctx = crtc->ctx;



	if (ctx->suspended)

	if (test_bit(BIT_SUSPENDED, &ctx->flags))

		return;



	if (test_and_clear_bit(0, &ctx->irq_flags))

	if (test_and_clear_bit(BIT_IRQS_ENABLED, &ctx->flags))

		writel(0, ctx->addr + DECON_VIDINTCON0);

}



static void decon_setup_trigger(struct decon_context *ctx)

{

	u32 val = TRIGCON_TRIGEN_PER_F | TRIGCON_TRIGEN_F |

			TRIGCON_TE_AUTO_MASK | TRIGCON_SWTRIGEN;

	u32 val = (ctx->out_type != IFTYPE_HDMI)

		? TRIGCON_TRIGEN_PER_F | TRIGCON_TRIGEN_F |

		  TRIGCON_TE_AUTO_MASK | TRIGCON_SWTRIGEN

		: TRIGCON_TRIGEN_PER_F | TRIGCON_TRIGEN_F |

		  TRIGCON_HWTRIGMASK_I80_RGB | TRIGCON_HWTRIGEN_I80_RGB;

	writel(val, ctx->addr + DECON_TRIGCON);

}



static void decon_commit(struct exynos_drm_crtc *crtc)

{

	struct decon_context *ctx = crtc->ctx;

	struct drm_display_mode *mode = &crtc->base.mode;

	struct drm_display_mode *m = &crtc->base.mode;

	u32 val;



	if (ctx->suspended)

	if (test_bit(BIT_SUSPENDED, &ctx->flags))

		return;



	if (ctx->out_type == IFTYPE_HDMI) {

		m->crtc_hsync_start = m->crtc_hdisplay + 10;

		m->crtc_hsync_end = m->crtc_htotal - 92;

		m->crtc_vsync_start = m->crtc_vdisplay + 1;

		m->crtc_vsync_end = m->crtc_vsync_start + 1;

	}



	decon_set_bits(ctx, DECON_VIDCON0, VIDCON0_ENVID, 0);



	/* enable clock gate */

	val = CMU_CLKGAGE_MODE_SFR_F | CMU_CLKGAGE_MODE_MEM_F;

	writel(val, ctx->addr + DECON_CMU);



	/* lcd on and use command if */

	val = VIDOUT_LCD_ON;

	if (ctx->i80_if)

	if (ctx->out_type == IFTYPE_I80)

		val |= VIDOUT_COMMAND_IF;

	else

		val |= VIDOUT_RGB_IF;

	writel(val, ctx->addr + DECON_VIDOUTCON0);



	val = VIDTCON2_LINEVAL(mode->vdisplay - 1) |

		VIDTCON2_HOZVAL(mode->hdisplay - 1);

	val = VIDTCON2_LINEVAL(m->vdisplay - 1) |

		VIDTCON2_HOZVAL(m->hdisplay - 1);

	writel(val, ctx->addr + DECON_VIDTCON2);



	if (!ctx->i80_if) {

	if (ctx->out_type != IFTYPE_I80) {

		val = VIDTCON00_VBPD_F(

				mode->crtc_vtotal - mode->crtc_vsync_end) |

				m->crtc_vtotal - m->crtc_vsync_end - 1) |

			VIDTCON00_VFPD_F(

				mode->crtc_vsync_start - mode->crtc_vdisplay);

				m->crtc_vsync_start - m->crtc_vdisplay - 1);

		writel(val, ctx->addr + DECON_VIDTCON00);



		val = VIDTCON01_VSPW_F(

				mode->crtc_vsync_end - mode->crtc_vsync_start);

				m->crtc_vsync_end - m->crtc_vsync_start - 1);

		writel(val, ctx->addr + DECON_VIDTCON01);



		val = VIDTCON10_HBPD_F(

				mode->crtc_htotal - mode->crtc_hsync_end) |

				m->crtc_htotal - m->crtc_hsync_end - 1) |

			VIDTCON10_HFPD_F(

				mode->crtc_hsync_start - mode->crtc_hdisplay);

				m->crtc_hsync_start - m->crtc_hdisplay - 1);

		writel(val, ctx->addr + DECON_VIDTCON10);



		val = VIDTCON11_HSPW_F(

				mode->crtc_hsync_end - mode->crtc_hsync_start);

				m->crtc_hsync_end - m->crtc_hsync_start - 1);

		writel(val, ctx->addr + DECON_VIDTCON11);

	}



	decon_setup_trigger(ctx);



	/* enable output and display signal */

	val = VIDCON0_ENVID | VIDCON0_ENVID_F;

	writel(val, ctx->addr + DECON_VIDCON0);

	decon_set_bits(ctx, DECON_VIDCON0, VIDCON0_ENVID | VIDCON0_ENVID_F, ~0);

}



#define COORDINATE_X(x)		(((x) & 0xfff) << 12)

#define COORDINATE_Y(x)		((x) & 0xfff)

#define OFFSIZE(x)		(((x) & 0x3fff) << 14)

#define PAGEWIDTH(x)		((x) & 0x3fff)



static void decon_win_set_pixfmt(struct decon_context *ctx, unsigned int win,

				 struct drm_framebuffer *fb)

{
@@ -214,16 +237,8 @@ static void decon_win_set_pixfmt(struct decon_context *ctx, unsigned int win, 
static void decon_shadow_protect_win(struct decon_context *ctx, int win,

					bool protect)

{

	u32 val;



	val = readl(ctx->addr + DECON_SHADOWCON);



	if (protect)

		val |= SHADOWCON_Wx_PROTECT(win);

	else

		val &= ~SHADOWCON_Wx_PROTECT(win);



	writel(val, ctx->addr + DECON_SHADOWCON);

	decon_set_bits(ctx, DECON_SHADOWCON, SHADOWCON_Wx_PROTECT(win),

		       protect ? ~0 : 0);

}



static void decon_atomic_begin(struct exynos_drm_crtc *crtc,
@@ -231,12 +246,16 @@ static void decon_atomic_begin(struct exynos_drm_crtc *crtc, 
{

	struct decon_context *ctx = crtc->ctx;



	if (ctx->suspended)

	if (test_bit(BIT_SUSPENDED, &ctx->flags))

		return;



	decon_shadow_protect_win(ctx, plane->zpos, true);

}



#define BIT_VAL(x, e, s) (((x) & ((1 << ((e) - (s) + 1)) - 1)) << (s))

#define COORDINATE_X(x) BIT_VAL((x), 23, 12)

#define COORDINATE_Y(x) BIT_VAL((x), 11, 0)



static void decon_update_plane(struct exynos_drm_crtc *crtc,

			       struct exynos_drm_plane *plane)

{
@@ -247,7 +266,7 @@ static void decon_update_plane(struct exynos_drm_crtc *crtc, 
	unsigned int pitch = state->fb->pitches[0];

	u32 val;



	if (ctx->suspended)

	if (test_bit(BIT_SUSPENDED, &ctx->flags))

		return;



	val = COORDINATE_X(plane->crtc_x) | COORDINATE_Y(plane->crtc_y);
@@ -270,21 +289,21 @@ static void decon_update_plane(struct exynos_drm_crtc *crtc, 
	val = plane->dma_addr[0] + pitch * plane->crtc_h;

	writel(val, ctx->addr + DECON_VIDW0xADD1B0(win));



	val = OFFSIZE(pitch - plane->crtc_w * bpp)

		| PAGEWIDTH(plane->crtc_w * bpp);

	if (ctx->out_type != IFTYPE_HDMI)

		val = BIT_VAL(pitch - plane->crtc_w * bpp, 27, 14)

			| BIT_VAL(plane->crtc_w * bpp, 13, 0);

	else

		val = BIT_VAL(pitch - plane->crtc_w * bpp, 29, 15)

			| BIT_VAL(plane->crtc_w * bpp, 14, 0);

	writel(val, ctx->addr + DECON_VIDW0xADD2(win));



	decon_win_set_pixfmt(ctx, win, state->fb);



	/* window enable */

	val = readl(ctx->addr + DECON_WINCONx(win));

	val |= WINCONx_ENWIN_F;

	writel(val, ctx->addr + DECON_WINCONx(win));

	decon_set_bits(ctx, DECON_WINCONx(win), WINCONx_ENWIN_F, ~0);



	/* standalone update */

	val = readl(ctx->addr + DECON_UPDATE);

	val |= STANDALONE_UPDATE_F;

	writel(val, ctx->addr + DECON_UPDATE);

	decon_set_bits(ctx, DECON_UPDATE, STANDALONE_UPDATE_F, ~0);

}



static void decon_disable_plane(struct exynos_drm_crtc *crtc,
@@ -292,24 +311,19 @@ static void decon_disable_plane(struct exynos_drm_crtc *crtc, 
{

	struct decon_context *ctx = crtc->ctx;

	unsigned int win = plane->zpos;

	u32 val;



	if (ctx->suspended)

	if (test_bit(BIT_SUSPENDED, &ctx->flags))

		return;



	decon_shadow_protect_win(ctx, win, true);



	/* window disable */

	val = readl(ctx->addr + DECON_WINCONx(win));

	val &= ~WINCONx_ENWIN_F;

	writel(val, ctx->addr + DECON_WINCONx(win));

	decon_set_bits(ctx, DECON_WINCONx(win), WINCONx_ENWIN_F, 0);



	decon_shadow_protect_win(ctx, win, false);



	/* standalone update */

	val = readl(ctx->addr + DECON_UPDATE);

	val |= STANDALONE_UPDATE_F;

	writel(val, ctx->addr + DECON_UPDATE);

	decon_set_bits(ctx, DECON_UPDATE, STANDALONE_UPDATE_F, ~0);

}



static void decon_atomic_flush(struct exynos_drm_crtc *crtc,
@@ -317,13 +331,13 @@ static void decon_atomic_flush(struct exynos_drm_crtc *crtc, 
{

	struct decon_context *ctx = crtc->ctx;



	if (ctx->suspended)

	if (test_bit(BIT_SUSPENDED, &ctx->flags))

		return;



	decon_shadow_protect_win(ctx, plane->zpos, false);



	if (ctx->i80_if)

		atomic_set(&ctx->win_updated, 1);

	if (ctx->out_type == IFTYPE_I80)

		set_bit(BIT_WIN_UPDATED, &ctx->flags);

}



static void decon_swreset(struct decon_context *ctx)
@@ -347,6 +361,17 @@ static void decon_swreset(struct decon_context *ctx) 
	}



	WARN(tries == 0, "failed to software reset DECON\n");



	if (ctx->out_type != IFTYPE_HDMI)

		return;



	writel(VIDCON0_CLKVALUP | VIDCON0_VLCKFREE, ctx->addr + DECON_VIDCON0);

	decon_set_bits(ctx, DECON_CMU,

		       CMU_CLKGAGE_MODE_SFR_F | CMU_CLKGAGE_MODE_MEM_F, ~0);

	writel(VIDCON1_VCLK_RUN_VDEN_DISABLE, ctx->addr + DECON_VIDCON1);

	writel(CRCCTRL_CRCEN | CRCCTRL_CRCSTART_F | CRCCTRL_CRCCLKEN,

	       ctx->addr + DECON_CRCCTRL);

	decon_setup_trigger(ctx);

}



static void decon_enable(struct exynos_drm_crtc *crtc)
@@ -355,11 +380,9 @@ static void decon_enable(struct exynos_drm_crtc *crtc) 
	int ret;

	int i;



	if (!ctx->suspended)

	if (!test_and_clear_bit(BIT_SUSPENDED, &ctx->flags))

		return;



	ctx->suspended = false;



	pm_runtime_get_sync(ctx->dev);



	for (i = 0; i < ARRAY_SIZE(decon_clks_name); i++) {
@@ -368,10 +391,10 @@ static void decon_enable(struct exynos_drm_crtc *crtc) 
			goto err;

	}



	set_bit(BIT_CLKS_ENABLED, &ctx->enabled);

	set_bit(BIT_CLKS_ENABLED, &ctx->flags);



	/* if vblank was enabled status, enable it again. */

	if (test_and_clear_bit(0, &ctx->irq_flags))

	if (test_and_clear_bit(BIT_IRQS_ENABLED, &ctx->flags))

		decon_enable_vblank(ctx->crtc);



	decon_commit(ctx->crtc);
@@ -381,7 +404,7 @@ static void decon_enable(struct exynos_drm_crtc *crtc) 
	while (--i >= 0)

		clk_disable_unprepare(ctx->clks[i]);



	ctx->suspended = true;

	set_bit(BIT_SUSPENDED, &ctx->flags);

}



static void decon_disable(struct exynos_drm_crtc *crtc)
@@ -389,7 +412,7 @@ static void decon_disable(struct exynos_drm_crtc *crtc) 
	struct decon_context *ctx = crtc->ctx;

	int i;



	if (ctx->suspended)

	if (test_bit(BIT_SUSPENDED, &ctx->flags))

		return;



	/*
@@ -397,7 +420,7 @@ static void decon_disable(struct exynos_drm_crtc *crtc) 
	 * suspend that connector. Otherwise we might try to scan from

	 * a destroyed buffer later.

	 */

	for (i = 0; i < WINDOWS_NR; i++)

	for (i = ctx->first_win; i < WINDOWS_NR; i++)

		decon_disable_plane(crtc, &ctx->planes[i]);



	decon_swreset(ctx);
@@ -405,27 +428,22 @@ static void decon_disable(struct exynos_drm_crtc *crtc) 
	for (i = 0; i < ARRAY_SIZE(decon_clks_name); i++)

		clk_disable_unprepare(ctx->clks[i]);



	clear_bit(BIT_CLKS_ENABLED, &ctx->enabled);

	clear_bit(BIT_CLKS_ENABLED, &ctx->flags);



	pm_runtime_put_sync(ctx->dev);



	ctx->suspended = true;

	set_bit(BIT_SUSPENDED, &ctx->flags);

}



void decon_te_irq_handler(struct exynos_drm_crtc *crtc)

{

	struct decon_context *ctx = crtc->ctx;

	u32 val;



	if (!test_bit(BIT_CLKS_ENABLED, &ctx->enabled))

	if (!test_bit(BIT_CLKS_ENABLED, &ctx->flags))

		return;



	if (atomic_add_unless(&ctx->win_updated, -1, 0)) {

		/* trigger */

		val = readl(ctx->addr + DECON_TRIGCON);

		val |= TRIGCON_SWTRIGCMD;

		writel(val, ctx->addr + DECON_TRIGCON);

	}

	if (test_and_clear_bit(BIT_WIN_UPDATED, &ctx->flags))

		decon_set_bits(ctx, DECON_TRIGCON, TRIGCON_SWTRIGCMD, ~0);



	drm_crtc_handle_vblank(&ctx->crtc->base);

}
@@ -434,7 +452,6 @@ static void decon_clear_channels(struct exynos_drm_crtc *crtc) 
{

	struct decon_context *ctx = crtc->ctx;

	int win, i, ret;

	u32 val;



	DRM_DEBUG_KMS("%s\n", __FILE__);
@@ -445,25 +462,10 @@ static void decon_clear_channels(struct exynos_drm_crtc *crtc) 
	}



	for (win = 0; win < WINDOWS_NR; win++) {

		/* shadow update disable */

		val = readl(ctx->addr + DECON_SHADOWCON);

		val |= SHADOWCON_Wx_PROTECT(win);

		writel(val, ctx->addr + DECON_SHADOWCON);



		/* window disable */

		val = readl(ctx->addr + DECON_WINCONx(win));

		val &= ~WINCONx_ENWIN_F;

		writel(val, ctx->addr + DECON_WINCONx(win));



		/* shadow update enable */

		val = readl(ctx->addr + DECON_SHADOWCON);

		val &= ~SHADOWCON_Wx_PROTECT(win);

		writel(val, ctx->addr + DECON_SHADOWCON);



		/* standalone update */

		val = readl(ctx->addr + DECON_UPDATE);

		val |= STANDALONE_UPDATE_F;

		writel(val, ctx->addr + DECON_UPDATE);

		decon_shadow_protect_win(ctx, win, true);

		decon_set_bits(ctx, DECON_WINCONx(win), WINCONx_ENWIN_F, 0);

		decon_shadow_protect_win(ctx, win, false);

		decon_set_bits(ctx, DECON_UPDATE, STANDALONE_UPDATE_F, ~0);

	}

	/* TODO: wait for possible vsync */

	msleep(50);
@@ -479,7 +481,6 @@ static struct exynos_drm_crtc_ops decon_crtc_ops = { 
	.commit			= decon_commit,

	.enable_vblank		= decon_enable_vblank,

	.disable_vblank		= decon_disable_vblank,

	.commit			= decon_commit,

	.atomic_begin		= decon_atomic_begin,

	.update_plane		= decon_update_plane,

	.disable_plane		= decon_disable_plane,
@@ -493,26 +494,30 @@ static int decon_bind(struct device *dev, struct device *master, void *data) 
	struct drm_device *drm_dev = data;

	struct exynos_drm_private *priv = drm_dev->dev_private;

	struct exynos_drm_plane *exynos_plane;

	enum exynos_drm_output_type out_type;

	enum drm_plane_type type;

	unsigned int zpos;

	unsigned int win;

	int ret;



	ctx->drm_dev = drm_dev;

	ctx->pipe = priv->pipe++;



	for (zpos = 0; zpos < WINDOWS_NR; zpos++) {

		type = (zpos == ctx->default_win) ? DRM_PLANE_TYPE_PRIMARY :

							DRM_PLANE_TYPE_OVERLAY;

		ret = exynos_plane_init(drm_dev, &ctx->planes[zpos],

	for (win = ctx->first_win; win < WINDOWS_NR; win++) {

		int tmp = (win == ctx->first_win) ? 0 : win;



		type = exynos_plane_get_type(tmp, CURSOR_WIN);

		ret = exynos_plane_init(drm_dev, &ctx->planes[win],

				1 << ctx->pipe, type, decon_formats,

				ARRAY_SIZE(decon_formats), zpos);

				ARRAY_SIZE(decon_formats), win);

		if (ret)

			return ret;

	}



	exynos_plane = &ctx->planes[ctx->default_win];

	exynos_plane = &ctx->planes[ctx->first_win];

	out_type = (ctx->out_type == IFTYPE_HDMI) ? EXYNOS_DISPLAY_TYPE_HDMI

						  : EXYNOS_DISPLAY_TYPE_LCD;

	ctx->crtc = exynos_drm_crtc_create(drm_dev, &exynos_plane->base,

					ctx->pipe, EXYNOS_DISPLAY_TYPE_LCD,

					ctx->pipe, out_type,

					&decon_crtc_ops, ctx);

	if (IS_ERR(ctx->crtc)) {

		ret = PTR_ERR(ctx->crtc);
@@ -546,38 +551,20 @@ static const struct component_ops decon_component_ops = { 
	.unbind = decon_unbind,

};



static irqreturn_t decon_vsync_irq_handler(int irq, void *dev_id)

{

	struct decon_context *ctx = dev_id;

	u32 val;



	if (!test_bit(BIT_CLKS_ENABLED, &ctx->enabled))

		goto out;



	val = readl(ctx->addr + DECON_VIDINTCON1);

	if (val & VIDINTCON1_INTFRMPEND) {

		drm_crtc_handle_vblank(&ctx->crtc->base);



		/* clear */

		writel(VIDINTCON1_INTFRMPEND, ctx->addr + DECON_VIDINTCON1);

	}



out:

	return IRQ_HANDLED;

}



static irqreturn_t decon_lcd_sys_irq_handler(int irq, void *dev_id)

static irqreturn_t decon_irq_handler(int irq, void *dev_id)

{

	struct decon_context *ctx = dev_id;

	u32 val;

	int win;



	if (!test_bit(BIT_CLKS_ENABLED, &ctx->enabled))

	if (!test_bit(BIT_CLKS_ENABLED, &ctx->flags))

		goto out;



	val = readl(ctx->addr + DECON_VIDINTCON1);

	if (val & VIDINTCON1_INTFRMDONEPEND) {

		for (win = 0 ; win < WINDOWS_NR ; win++) {

	val &= VIDINTCON1_INTFRMDONEPEND | VIDINTCON1_INTFRMPEND;



	if (val) {

		for (win = ctx->first_win; win < WINDOWS_NR ; win++) {

			struct exynos_drm_plane *plane = &ctx->planes[win];



			if (!plane->pending_fb)
@@ -587,16 +574,29 @@ static irqreturn_t decon_lcd_sys_irq_handler(int irq, void *dev_id) 
		}



		/* clear */

		writel(VIDINTCON1_INTFRMDONEPEND,

				ctx->addr + DECON_VIDINTCON1);

		writel(val, ctx->addr + DECON_VIDINTCON1);

	}



out:

	return IRQ_HANDLED;

}



static const struct of_device_id exynos5433_decon_driver_dt_match[] = {

	{

		.compatible = "samsung,exynos5433-decon",

		.data = (void *)IFTYPE_RGB

	},

	{

		.compatible = "samsung,exynos5433-decon-tv",

		.data = (void *)IFTYPE_HDMI

	},

	{},

};

MODULE_DEVICE_TABLE(of, exynos5433_decon_driver_dt_match);



static int exynos5433_decon_probe(struct platform_device *pdev)

{

	const struct of_device_id *of_id;

	struct device *dev = &pdev->dev;

	struct decon_context *ctx;

	struct resource *res;
@@ -607,11 +607,16 @@ static int exynos5433_decon_probe(struct platform_device *pdev) 
	if (!ctx)

		return -ENOMEM;



	ctx->default_win = 0;

	ctx->suspended = true;

	__set_bit(BIT_SUSPENDED, &ctx->flags);

	ctx->dev = dev;

	if (of_get_child_by_name(dev->of_node, "i80-if-timings"))

		ctx->i80_if = true;



	of_id = of_match_device(exynos5433_decon_driver_dt_match, &pdev->dev);

	ctx->out_type = (enum decon_iftype)of_id->data;



	if (ctx->out_type == IFTYPE_HDMI)

		ctx->first_win = 1;

	else if (of_get_child_by_name(dev->of_node, "i80-if-timings"))

		ctx->out_type = IFTYPE_I80;



	for (i = 0; i < ARRAY_SIZE(decon_clks_name); i++) {

		struct clk *clk;
@@ -636,14 +641,13 @@ static int exynos5433_decon_probe(struct platform_device *pdev) 
	}



	res = platform_get_resource_byname(pdev, IORESOURCE_IRQ,

			ctx->i80_if ? "lcd_sys" : "vsync");

			(ctx->out_type == IFTYPE_I80) ? "lcd_sys" : "vsync");

	if (!res) {

		dev_err(dev, "cannot find IRQ resource\n");

		return -ENXIO;

	}



	ret = devm_request_irq(dev, res->start, ctx->i80_if ?

			decon_lcd_sys_irq_handler : decon_vsync_irq_handler, 0,

	ret = devm_request_irq(dev, res->start, decon_irq_handler, 0,

			       "drm_decon", ctx);

	if (ret < 0) {

		dev_err(dev, "lcd_sys irq request failed\n");
@@ -675,12 +679,6 @@ static int exynos5433_decon_remove(struct platform_device *pdev) 
	return 0;

}



static const struct of_device_id exynos5433_decon_driver_dt_match[] = {

	{ .compatible = "samsung,exynos5433-decon" },

	{},

};

MODULE_DEVICE_TABLE(of, exynos5433_decon_driver_dt_match);



struct platform_driver exynos5433_decon_driver = {

	.probe		= exynos5433_decon_probe,

	.remove		= exynos5433_decon_remove,

drivers/gpu/drm/exynos/exynos7_drm_decon.c

+3 −4
Original line number Diff line number Diff line
@@ -40,6 +40,7 @@ 
#define MIN_FB_WIDTH_FOR_16WORD_BURST 128



#define WINDOWS_NR	2

#define CURSOR_WIN	1



struct decon_context {

	struct device			*dev;
@@ -51,7 +52,6 @@ struct decon_context { 
	struct clk			*eclk;

	struct clk			*vclk;

	void __iomem			*regs;

	unsigned int			default_win;

	unsigned long			irq_flags;

	bool				i80_if;

	bool				suspended;
@@ -690,8 +690,7 @@ static int decon_bind(struct device *dev, struct device *master, void *data) 
	}



	for (zpos = 0; zpos < WINDOWS_NR; zpos++) {

		type = (zpos == ctx->default_win) ? DRM_PLANE_TYPE_PRIMARY :

						DRM_PLANE_TYPE_OVERLAY;

		type = exynos_plane_get_type(zpos, CURSOR_WIN);

		ret = exynos_plane_init(drm_dev, &ctx->planes[zpos],

					1 << ctx->pipe, type, decon_formats,

					ARRAY_SIZE(decon_formats), zpos);
@@ -699,7 +698,7 @@ static int decon_bind(struct device *dev, struct device *master, void *data) 
			return ret;

	}



	exynos_plane = &ctx->planes[ctx->default_win];

	exynos_plane = &ctx->planes[DEFAULT_WIN];

	ctx->crtc = exynos_drm_crtc_create(drm_dev, &exynos_plane->base,

					   ctx->pipe, EXYNOS_DISPLAY_TYPE_LCD,

					   &decon_crtc_ops, ctx);