Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit b3f2dcdd authored by Sugar Zhang's avatar Sugar Zhang Committed by Mark Brown
Browse files

ASoC: rockchip: i2s: share tx/rx lrck when symmetric_rates enabled 



share lrck_tx to lrck_rx when symmetric_rates enabled.

Signed-off-by: default avatarSugar Zhang <sugar.zhang@rock-chips.com>
Signed-off-by: default avatarMark Brown <broonie@kernel.org>
parent d307e01e

sound/soc/rockchip/rockchip_i2s.c

+8 −0
Original line number Diff line number Diff line
@@ -226,6 +226,7 @@ static int rockchip_i2s_hw_params(struct snd_pcm_substream *substream, 
				  struct snd_soc_dai *dai)

{

	struct rk_i2s_dev *i2s = to_info(dai);

	struct snd_soc_pcm_runtime *rtd = substream->private_data;

	unsigned int val = 0;



	switch (params_format(params)) {
@@ -278,6 +279,13 @@ static int rockchip_i2s_hw_params(struct snd_pcm_substream *substream, 
	regmap_update_bits(i2s->regmap, I2S_DMACR, I2S_DMACR_RDL_MASK,

			   I2S_DMACR_RDL(16));



	val = I2S_CKR_TRCM_TXRX;

	if (dai->driver->symmetric_rates || rtd->dai_link->symmetric_rates)

		val = I2S_CKR_TRCM_TXSHARE;



	regmap_update_bits(i2s->regmap, I2S_CKR,

			   I2S_CKR_TRCM_MASK,

			   val);

	return 0;

}

sound/soc/rockchip/rockchip_i2s.h

+6 −0
Original line number Diff line number Diff line
@@ -78,6 +78,12 @@ 
 * CKR

 * clock generation register

*/

#define I2S_CKR_TRCM_SHIFT	28

#define I2S_CKR_TRCM(x)	(x << I2S_CKR_TRCM_SHIFT)

#define I2S_CKR_TRCM_TXRX	(0 << I2S_CKR_TRCM_SHIFT)

#define I2S_CKR_TRCM_TXSHARE	(1 << I2S_CKR_TRCM_SHIFT)

#define I2S_CKR_TRCM_RXSHARE	(2 << I2S_CKR_TRCM_SHIFT)

#define I2S_CKR_TRCM_MASK	(3 << I2S_CKR_TRCM_SHIFT)

#define I2S_CKR_MSS_SHIFT	27

#define I2S_CKR_MSS_MASTER	(0 << I2S_CKR_MSS_SHIFT)

#define I2S_CKR_MSS_SLAVE	(1 << I2S_CKR_MSS_SHIFT)