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Commit b2dc04c5 authored Feb 23, 2016 by Srinivas Kandagatla Committed by Andy Gross Feb 26, 2016

ARM: dts: apq8064: add spi5 device node.



This patch adds spi5 device node, spi5 is used on ifc6410 on the
expansion connector.

Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>

parent 64b22b25

arch/arm/boot/dts/qcom-apq8064-pins.dtsi

+38 −0

Original line number	Diff line number	Diff line
		@@ -64,6 +64,44 @@
		};
		};

		spi5_default: spi5_default {
		pinmux {
		pins = "gpio51", "gpio52", "gpio54";
		function = "gsbi5";
		};

		pinmux_cs {
		function = "gpio";
		pins = "gpio53";
		};

		pinconf {
		pins = "gpio51", "gpio52", "gpio54";
		drive-strength = <16>;
		bias-disable;
		};

		pinconf_cs {
		pins = "gpio53";
		drive-strength = <16>;
		bias-disable;
		output-high;
		};
		};

		spi5_sleep: spi5_sleep {
		pinmux {
		function = "gpio";
		pins = "gpio51", "gpio52", "gpio53", "gpio54";
		};

		pinconf {
		pins = "gpio51", "gpio52", "gpio53", "gpio54";
		drive-strength = <2>;
		bias-pull-down;
		};
		};

		gsbi6_uart_2pins: gsbi6_uart_2pins {
		mux {
		pins = "gpio14", "gpio15";

arch/arm/boot/dts/qcom-apq8064.dtsi

+14 −0

Original line number	Diff line number	Diff line
		@@ -236,6 +236,7 @@
		#address-cells = <1>;
		#size-cells = <0>;
		};

		};

		gsbi2: gsbi@12480000 {
		@@ -306,6 +307,19 @@
		clock-names = "core", "iface";
		status = "disabled";
		};

		gsbi5_spi: spi@1a280000 {
		compatible = "qcom,spi-qup-v1.1.1";
		reg = <0x1a280000 0x1000>;
		interrupts = <0 155 0>;
		pinctrl-0 = <&spi5_default &spi5_sleep>;
		pinctrl-names = "default", "sleep";
		clocks = <&gcc GSBI5_QUP_CLK>, <&gcc GSBI5_H_CLK>;
		clock-names = "core", "iface";
		status = "disabled";
		#address-cells = <1>;
		#size-cells = <0>;
		};
		};

		gsbi6: gsbi@16500000 {