Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit b1cb4f93 authored by Linus Torvalds's avatar Linus Torvalds
Browse files
Pull powerpc fixes from Michael Ellerman:

 - Fix crashes when loading modules built with a different
   CONFIG_RELOCATABLE value by adding CONFIG_RELOCATABLE to vermagic.

 - Fix busy loops in the OPAL NVRAM driver if we get certain error
   conditions from firmware.

 - Remove tlbie trace points from KVM code that's called in real mode,
   because it causes crashes.

 - Fix checkstops caused by invalid tlbiel on Power9 Radix.

 - Ensure the set of CPU features we "know" are always enabled is
   actually the minimal set when we build with support for firmware
   supplied CPU features.

Thanks to: Aneesh Kumar K.V, Anshuman Khandual, Nicholas Piggin.

* tag 'powerpc-4.17-2' of git://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux:
  powerpc/64s: Fix CPU_FTRS_ALWAYS vs DT CPU features
  powerpc/mm/radix: Fix checkstops caused by invalid tlbiel
  KVM: PPC: Book3S HV: trace_tlbie must not be called in realmode
  powerpc/8xx: Fix build with hugetlbfs enabled
  powerpc/powernv: Fix OPAL NVRAM driver OPAL_BUSY loops
  powerpc/powernv: define a standard delay for OPAL_BUSY type retry loops
  powerpc/fscr: Enable interrupts earlier before calling get_user()
  powerpc/64s: Fix section mismatch warnings from setup_rfi_flush()
  powerpc/modules: Fix crashes by adding CONFIG_RELOCATABLE to vermagic
parents 18b7fd1c 81b654c2
Loading
Loading
Loading
Loading
+21 −2
Original line number Diff line number Diff line
@@ -545,18 +545,37 @@ enum {
#ifdef CONFIG_PPC_BOOK3E
#define CPU_FTRS_ALWAYS		(CPU_FTRS_E6500 & CPU_FTRS_E5500)
#else

#ifdef CONFIG_PPC_DT_CPU_FTRS
#define CPU_FTRS_DT_CPU_BASE			\
	(CPU_FTR_LWSYNC |			\
	 CPU_FTR_FPU_UNAVAILABLE |		\
	 CPU_FTR_NODSISRALIGN |			\
	 CPU_FTR_NOEXECUTE |			\
	 CPU_FTR_COHERENT_ICACHE |		\
	 CPU_FTR_STCX_CHECKS_ADDRESS |		\
	 CPU_FTR_POPCNTB | CPU_FTR_POPCNTD |	\
	 CPU_FTR_DAWR |				\
	 CPU_FTR_ARCH_206 |			\
	 CPU_FTR_ARCH_207S)
#else
#define CPU_FTRS_DT_CPU_BASE	(~0ul)
#endif

#ifdef CONFIG_CPU_LITTLE_ENDIAN
#define CPU_FTRS_ALWAYS \
	    (CPU_FTRS_POSSIBLE & ~CPU_FTR_HVMODE & CPU_FTRS_POWER7 & \
	     CPU_FTRS_POWER8E & CPU_FTRS_POWER8 & CPU_FTRS_POWER8_DD1 & \
	     CPU_FTRS_POWER9 & CPU_FTRS_POWER9_DD1 & CPU_FTRS_POWER9_DD2_1)
	     CPU_FTRS_POWER9 & CPU_FTRS_POWER9_DD1 & CPU_FTRS_POWER9_DD2_1 & \
	     CPU_FTRS_DT_CPU_BASE)
#else
#define CPU_FTRS_ALWAYS		\
	    (CPU_FTRS_PPC970 & CPU_FTRS_POWER5 & \
	     CPU_FTRS_POWER6 & CPU_FTRS_POWER7 & CPU_FTRS_CELL & \
	     CPU_FTRS_PA6T & CPU_FTRS_POWER8 & CPU_FTRS_POWER8E & \
	     CPU_FTRS_POWER8_DD1 & ~CPU_FTR_HVMODE & CPU_FTRS_POSSIBLE & \
	     CPU_FTRS_POWER9 & CPU_FTRS_POWER9_DD1 & CPU_FTRS_POWER9_DD2_1)
	     CPU_FTRS_POWER9 & CPU_FTRS_POWER9_DD1 & CPU_FTRS_POWER9_DD2_1 & \
	     CPU_FTRS_DT_CPU_BASE)
#endif /* CONFIG_CPU_LITTLE_ENDIAN */
#endif
#else
+11 −1
Original line number Diff line number Diff line
@@ -15,9 +15,19 @@


#ifdef CC_USING_MPROFILE_KERNEL
#define MODULE_ARCH_VERMAGIC	"mprofile-kernel"
#define MODULE_ARCH_VERMAGIC_FTRACE	"mprofile-kernel "
#else
#define MODULE_ARCH_VERMAGIC_FTRACE	""
#endif

#ifdef CONFIG_RELOCATABLE
#define MODULE_ARCH_VERMAGIC_RELOCATABLE	"relocatable "
#else
#define MODULE_ARCH_VERMAGIC_RELOCATABLE	""
#endif

#define MODULE_ARCH_VERMAGIC MODULE_ARCH_VERMAGIC_FTRACE MODULE_ARCH_VERMAGIC_RELOCATABLE

#ifndef __powerpc64__
/*
 * Thanks to Paul M for explaining this.
+3 −0
Original line number Diff line number Diff line
@@ -21,6 +21,9 @@
/* We calculate number of sg entries based on PAGE_SIZE */
#define SG_ENTRIES_PER_NODE ((PAGE_SIZE - 16) / sizeof(struct opal_sg_entry))

/* Default time to sleep or delay between OPAL_BUSY/OPAL_BUSY_EVENT loops */
#define OPAL_BUSY_DELAY_MS	10

/* /sys/firmware/opal */
extern struct kobject *opal_kobj;

+1 −13
Original line number Diff line number Diff line
@@ -53,18 +53,6 @@ struct dt_cpu_feature {
	int disabled;
};

#define CPU_FTRS_BASE \
	   (CPU_FTR_LWSYNC | \
	    CPU_FTR_FPU_UNAVAILABLE |\
	    CPU_FTR_NODSISRALIGN |\
	    CPU_FTR_NOEXECUTE |\
	    CPU_FTR_COHERENT_ICACHE | \
	    CPU_FTR_STCX_CHECKS_ADDRESS |\
	    CPU_FTR_POPCNTB | CPU_FTR_POPCNTD | \
	    CPU_FTR_DAWR | \
	    CPU_FTR_ARCH_206 |\
	    CPU_FTR_ARCH_207S)

#define MMU_FTRS_HASH_BASE (MMU_FTRS_POWER8)

#define COMMON_USER_BASE	(PPC_FEATURE_32 | PPC_FEATURE_64 | \
@@ -124,7 +112,7 @@ static char dt_cpu_name[64];

static struct cpu_spec __initdata base_cpu_spec = {
	.cpu_name		= NULL,
	.cpu_features		= CPU_FTRS_BASE,
	.cpu_features		= CPU_FTRS_DT_CPU_BASE,
	.cpu_user_features	= COMMON_USER_BASE,
	.cpu_user_features2	= COMMON_USER2_BASE,
	.mmu_features		= 0,
+1 −1
Original line number Diff line number Diff line
@@ -880,7 +880,7 @@ void rfi_flush_enable(bool enable)
	rfi_flush = enable;
}

static void init_fallback_flush(void)
static void __ref init_fallback_flush(void)
{
	u64 l1d_size, limit;
	int cpu;
Loading