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Commit afca11ec authored by Maxime Ripard's avatar Maxime Ripard Committed by Brian Norris
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mtd: nand: pxa3xx: Switch FIFO draining to jiffies-based timeout 



Now that the driver handles the FIFO draining in a threaded interrupt, we can
base our timeout on jiffies and sleeping, instead of using mdelay.

Signed-off-by: default avatarMaxime Ripard <maxime.ripard@free-electrons.com>
Signed-off-by: default avatarBrian Norris <computersforpeace@gmail.com>
parent 818a45b1

drivers/mtd/nand/pxa3xx_nand.c

+9 −11
Original line number Diff line number Diff line
@@ -22,6 +22,7 @@ 
#include <linux/mtd/nand.h>

#include <linux/mtd/partitions.h>

#include <linux/io.h>

#include <linux/iopoll.h>

#include <linux/irq.h>

#include <linux/slab.h>

#include <linux/of.h>
@@ -483,7 +484,8 @@ static void disable_int(struct pxa3xx_nand_info *info, uint32_t int_mask) 
static void drain_fifo(struct pxa3xx_nand_info *info, void *data, int len)

{

	if (info->ecc_bch) {

		int timeout;

		u32 val;

		int ret;



		/*

		 * According to the datasheet, when reading from NDDB
@@ -496,18 +498,14 @@ static void drain_fifo(struct pxa3xx_nand_info *info, void *data, int len) 
		while (len > 8) {

			__raw_readsl(info->mmio_base + NDDB, data, 8);



			for (timeout = 0;

			     !(nand_readl(info, NDSR) & NDSR_RDDREQ);

			     timeout++) {

				if (timeout >= 5) {

			ret = readl_relaxed_poll_timeout(info->mmio_base + NDSR, val,

							 val & NDSR_RDDREQ, 1000, 5000);

			if (ret) {

				dev_err(&info->pdev->dev,

					"Timeout on RDDREQ while draining the FIFO\n");

				return;

			}



				mdelay(1);

			}



			data += 32;

			len -= 8;

		}