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Commit ab68059e authored by Huazhong Tan's avatar Huazhong Tan Committed by David S. Miller
Browse files

net: hns3: use lower_32_bits and upper_32_bits 



MACRO lower_32_bits and upper_32_bits can help to get bits 0-31
and bits 32-63 of a number, so just use it.

Signed-off-by: default avatarHuazhong Tan <tanhuazhong@huawei.com>
Signed-off-by: default avatarPeng Li <lipeng321@huawei.com>
Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parent 541a7bd6

drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_cmd.c

+4 −4
Original line number Diff line number Diff line
@@ -123,9 +123,9 @@ static void hclge_cmd_config_regs(struct hclge_cmq_ring *ring) 


	if (ring->flag == HCLGE_TYPE_CSQ) {

		hclge_write_dev(hw, HCLGE_NIC_CSQ_BASEADDR_L_REG,

				(u32)dma);

				lower_32_bits(dma));

		hclge_write_dev(hw, HCLGE_NIC_CSQ_BASEADDR_H_REG,

				(u32)((dma >> 31) >> 1));

				upper_32_bits(dma));

		hclge_write_dev(hw, HCLGE_NIC_CSQ_DEPTH_REG,

				(ring->desc_num >> HCLGE_NIC_CMQ_DESC_NUM_S) |

				HCLGE_NIC_CMQ_ENABLE);
@@ -133,9 +133,9 @@ static void hclge_cmd_config_regs(struct hclge_cmq_ring *ring) 
		hclge_write_dev(hw, HCLGE_NIC_CSQ_HEAD_REG, 0);

	} else {

		hclge_write_dev(hw, HCLGE_NIC_CRQ_BASEADDR_L_REG,

				(u32)dma);

				lower_32_bits(dma));

		hclge_write_dev(hw, HCLGE_NIC_CRQ_BASEADDR_H_REG,

				(u32)((dma >> 31) >> 1));

				upper_32_bits(dma));

		hclge_write_dev(hw, HCLGE_NIC_CRQ_DEPTH_REG,

				(ring->desc_num >> HCLGE_NIC_CMQ_DESC_NUM_S) |

				HCLGE_NIC_CMQ_ENABLE);