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Commit ab5c608b authored by Ben Widawsky's avatar Ben Widawsky Committed by Daniel Vetter
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drm/i915: Don't touch South Display when PCH_NOP



Interrupts, clock gating, LVDS, and GMBUS are all within the, "this will
be bad for CPU" range when we have PCH_NOP.

There is a bit of a hack in init clock gating. We want to do most of the
clock gating, but the part we skip will hang the system. It could
probably be abstracted a bit better, but I don't feel it's too
unsightly.

v2: Use inverse HAS_PCH_NOP check (Jani)

v3: Actually do what I claimed in v2 (spotted by Daniel)
Merge Ivybridge IRQ handler PCH check to decrease whitespace (Daniel)
Move LVDS bail into this patch (Ben)

v4: logical rebase conflict resolution with SDEIIR (Ben)

Signed-off-by: default avatarBen Widawsky <ben@bwidawsk.net>

Brush up patch a bit and resolve conflicts:
- Adjust PCH_NOP checks due to Egbert's hpd handling rework.
- Addd a PCH_NOP check in the irq uninstall code.
- Resolve conflicts with Paulo's SDE irq handling race fix.

v5: Drop the added hunks in the ilk irq handler again, they're bogus.
OOps.

Signed-off-by: default avatarDaniel Vetter <daniel.vetter@ffwll.ch>
parent 40c7ead9
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+21 −7
Original line number Original line Diff line number Diff line
@@ -758,7 +758,7 @@ static irqreturn_t ivybridge_irq_handler(int irq, void *arg)
{
{
	struct drm_device *dev = (struct drm_device *) arg;
	struct drm_device *dev = (struct drm_device *) arg;
	drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private;
	drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private;
	u32 de_iir, gt_iir, de_ier, pm_iir, sde_ier;
	u32 de_iir, gt_iir, de_ier, pm_iir, sde_ier = 0;
	irqreturn_t ret = IRQ_NONE;
	irqreturn_t ret = IRQ_NONE;
	int i;
	int i;


@@ -773,9 +773,11 @@ static irqreturn_t ivybridge_irq_handler(int irq, void *arg)
	 * able to process them after we restore SDEIER (as soon as we restore
	 * able to process them after we restore SDEIER (as soon as we restore
	 * it, we'll get an interrupt if SDEIIR still has something to process
	 * it, we'll get an interrupt if SDEIIR still has something to process
	 * due to its back queue). */
	 * due to its back queue). */
	if (!HAS_PCH_NOP(dev)) {
		sde_ier = I915_READ(SDEIER);
		sde_ier = I915_READ(SDEIER);
		I915_WRITE(SDEIER, 0);
		I915_WRITE(SDEIER, 0);
		POSTING_READ(SDEIER);
		POSTING_READ(SDEIER);
	}


	gt_iir = I915_READ(GTIIR);
	gt_iir = I915_READ(GTIIR);
	if (gt_iir) {
	if (gt_iir) {
@@ -802,7 +804,7 @@ static irqreturn_t ivybridge_irq_handler(int irq, void *arg)
		}
		}


		/* check event from PCH */
		/* check event from PCH */
		if (de_iir & DE_PCH_EVENT_IVB) {
		if (!HAS_PCH_NOP(dev) && (de_iir & DE_PCH_EVENT_IVB)) {
			u32 pch_iir = I915_READ(SDEIIR);
			u32 pch_iir = I915_READ(SDEIIR);


			cpt_irq_handler(dev, pch_iir);
			cpt_irq_handler(dev, pch_iir);
@@ -825,8 +827,10 @@ static irqreturn_t ivybridge_irq_handler(int irq, void *arg)


	I915_WRITE(DEIER, de_ier);
	I915_WRITE(DEIER, de_ier);
	POSTING_READ(DEIER);
	POSTING_READ(DEIER);
	if (!HAS_PCH_NOP(dev)) {
		I915_WRITE(SDEIER, sde_ier);
		I915_WRITE(SDEIER, sde_ier);
		POSTING_READ(SDEIER);
		POSTING_READ(SDEIER);
	}


	return ret;
	return ret;
}
}
@@ -2027,6 +2031,9 @@ static void ironlake_irq_preinstall(struct drm_device *dev)
	I915_WRITE(GTIER, 0x0);
	I915_WRITE(GTIER, 0x0);
	POSTING_READ(GTIER);
	POSTING_READ(GTIER);


	if (HAS_PCH_NOP(dev))
		return;

	/* south display irq */
	/* south display irq */
	I915_WRITE(SDEIMR, 0xffffffff);
	I915_WRITE(SDEIMR, 0xffffffff);
	/*
	/*
@@ -2112,6 +2119,10 @@ static void ibx_irq_postinstall(struct drm_device *dev)
		mask = SDE_GMBUS | SDE_AUX_MASK;
		mask = SDE_GMBUS | SDE_AUX_MASK;
	else
	else
		mask = SDE_GMBUS_CPT | SDE_AUX_MASK_CPT;
		mask = SDE_GMBUS_CPT | SDE_AUX_MASK_CPT;

	if (HAS_PCH_NOP(dev))
		return;

	I915_WRITE(SDEIIR, I915_READ(SDEIIR));
	I915_WRITE(SDEIIR, I915_READ(SDEIIR));
	I915_WRITE(SDEIMR, ~mask);
	I915_WRITE(SDEIMR, ~mask);
}
}
@@ -2306,6 +2317,9 @@ static void ironlake_irq_uninstall(struct drm_device *dev)
	I915_WRITE(GTIER, 0x0);
	I915_WRITE(GTIER, 0x0);
	I915_WRITE(GTIIR, I915_READ(GTIIR));
	I915_WRITE(GTIIR, I915_READ(GTIIR));


	if (HAS_PCH_NOP(dev))
		return;

	I915_WRITE(SDEIMR, 0xffffffff);
	I915_WRITE(SDEIMR, 0xffffffff);
	I915_WRITE(SDEIER, 0x0);
	I915_WRITE(SDEIER, 0x0);
	I915_WRITE(SDEIIR, I915_READ(SDEIIR));
	I915_WRITE(SDEIIR, I915_READ(SDEIIR));
+3 −0
Original line number Original line Diff line number Diff line
@@ -692,6 +692,9 @@ intel_parse_bios(struct drm_device *dev)
	struct bdb_header *bdb = NULL;
	struct bdb_header *bdb = NULL;
	u8 __iomem *bios = NULL;
	u8 __iomem *bios = NULL;


	if (HAS_PCH_NOP(dev))
		return -ENODEV;

	init_vbt_defaults(dev_priv);
	init_vbt_defaults(dev_priv);


	/* XXX Should this validation be moved to intel_opregion.c? */
	/* XXX Should this validation be moved to intel_opregion.c? */
+3 −1
Original line number Original line Diff line number Diff line
@@ -522,7 +522,9 @@ int intel_setup_gmbus(struct drm_device *dev)
	struct drm_i915_private *dev_priv = dev->dev_private;
	struct drm_i915_private *dev_priv = dev->dev_private;
	int ret, i;
	int ret, i;


	if (HAS_PCH_SPLIT(dev))
	if (HAS_PCH_NOP(dev))
		return 0;
	else if (HAS_PCH_SPLIT(dev))
		dev_priv->gpio_mmio_base = PCH_GPIOA - GPIOA;
		dev_priv->gpio_mmio_base = PCH_GPIOA - GPIOA;
	else if (IS_VALLEYVIEW(dev))
	else if (IS_VALLEYVIEW(dev))
		dev_priv->gpio_mmio_base = VLV_DISPLAY_BASE;
		dev_priv->gpio_mmio_base = VLV_DISPLAY_BASE;
+2 −1
Original line number Original line Diff line number Diff line
@@ -3890,6 +3890,7 @@ static void ivybridge_init_clock_gating(struct drm_device *dev)
	snpcr |= GEN6_MBC_SNPCR_MED;
	snpcr |= GEN6_MBC_SNPCR_MED;
	I915_WRITE(GEN6_MBCUNIT_SNPCR, snpcr);
	I915_WRITE(GEN6_MBCUNIT_SNPCR, snpcr);


	if (!HAS_PCH_NOP(dev))
		cpt_init_clock_gating(dev);
		cpt_init_clock_gating(dev);


	gen6_check_mch_setup(dev);
	gen6_check_mch_setup(dev);