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Commit ab348681 authored by Al Viro's avatar Al Viro
Browse files

sparc32: switch to generic kernel_execve()



Signed-off-by: default avatarAl Viro <viro@zeniv.linux.org.uk>
parent c78e0643
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+1 −1
Original line number Diff line number Diff line
@@ -41,6 +41,7 @@ config SPARC
	select GENERIC_STRNLEN_USER
	select MODULES_USE_ELF_RELA
	select GENERIC_KERNEL_THREAD
	select GENERIC_KERNEL_EXECVE

config SPARC32
	def_bool !64BIT
@@ -75,7 +76,6 @@ config SPARC64
	select ARCH_HAVE_NMI_SAFE_CMPXCHG
	select HAVE_C_RECORDMCOUNT
	select NO_BOOTMEM
	select GENERIC_KERNEL_EXECVE

config ARCH_DEFCONFIG
	string
+3 −0
Original line number Diff line number Diff line
@@ -90,6 +90,9 @@ static inline bool pt_regs_clear_syscall(struct pt_regs *regs)
#define arch_ptrace_stop(exit_code, info) \
	synchronize_user_stack()

#define current_pt_regs() \
	((struct pt_regs *)((unsigned long)current_thread_info() + THREAD_SIZE) - 1)

#define user_mode(regs) (!((regs)->psr & PSR_PS))
#define instruction_pointer(regs) ((regs)->pc)
#define user_stack_pointer(regs) ((regs)->u_regs[UREG_FP])
+9 −2
Original line number Diff line number Diff line
@@ -990,8 +990,15 @@ ret_from_kernel_thread:
	ld	[%sp + STACKFRAME_SZ + PT_G1], %l0
	call	%l0
	 ld	[%sp + STACKFRAME_SZ + PT_G2], %o0
	call	do_exit	/* won't return */
	 clr	%o0
	rd	%psr, %l1
	ld	[%sp + STACKFRAME_SZ + PT_PSR], %l0
	andn	%l0, PSR_CWP, %l0
	nop
	and	%l1, PSR_CWP, %l1
	or	%l0, %l1, %l0
	st	%l0, [%sp + STACKFRAME_SZ + PT_PSR]
	b	ret_sys_call
	 mov	0, %o0

	/* Linux native system calls enter here... */
	.align	4
+0 −24
Original line number Diff line number Diff line
@@ -258,27 +258,3 @@ asmlinkage int sys_getdomainname(char __user *name, int len)
	up_read(&uts_sem);
	return err;
}

/*
 * Do a system call from kernel instead of calling sys_execve so we
 * end up with proper pt_regs.
 */
int kernel_execve(const char *filename,
		  const char *const argv[],
		  const char *const envp[])
{
	long __res;
	register long __g1 __asm__ ("g1") = __NR_execve;
	register long __o0 __asm__ ("o0") = (long)(filename);
	register long __o1 __asm__ ("o1") = (long)(argv);
	register long __o2 __asm__ ("o2") = (long)(envp);
	asm volatile ("t 0x10\n\t"
		      "bcc 1f\n\t"
		      "mov %%o0, %0\n\t"
		      "sub %%g0, %%o0, %0\n\t"
		      "1:\n\t"
		      : "=r" (__res), "=&r" (__o0)
		      : "1" (__o0), "r" (__o1), "r" (__o2), "r" (__g1)
		      : "cc");
	return __res;
}