Merge branch 'exynos-drm-next' of...

Device-Tree bindings for Samsung Exynos7 SoC display controller (DECON)

DECON (Display and Enhancement Controller) is the Display Controller for the

Exynos7 series of SoCs which transfers the image data from a video memory

buffer to an external LCD interface.

Required properties:

- compatible: value should be "samsung,exynos7-decon";

- reg: physical base address and length of the DECON registers set.

- interrupt-parent: should be the phandle of the decon controller's

		parent interrupt controller.

- interrupts: should contain a list of all DECON IP block interrupts in the

		 order: FIFO Level, VSYNC, LCD_SYSTEM. The interrupt specifier

		 format depends on the interrupt controller used.

- interrupt-names: should contain the interrupt names: "fifo", "vsync",

	"lcd_sys", in the same order as they were listed in the interrupts

        property.

- pinctrl-0: pin control group to be used for this controller.

- pinctrl-names: must contain a "default" entry.

- clocks: must include clock specifiers corresponding to entries in the

         clock-names property.

- clock-names: list of clock names sorted in the same order as the clocks

               property. Must contain "pclk_decon0", "aclk_decon0",

	       "decon0_eclk", "decon0_vclk".

- i80-if-timings: timing configuration for lcd i80 interface support.

Optional Properties:

- samsung,power-domain: a phandle to DECON power domain node.

- display-timings: timing settings for DECON, as described in document [1].

		Can be used in case timings cannot be provided otherwise

		or to override timings provided by the panel.

[1]: Documentation/devicetree/bindings/video/display-timing.txt

Example:

SoC specific DT entry:

	decon@13930000 {

		compatible = "samsung,exynos7-decon";

		interrupt-parent = <&combiner>;

		reg = <0x13930000 0x1000>;

		interrupt-names = "lcd_sys", "vsync", "fifo";

		interrupts = <0 188 0>, <0 189 0>, <0 190 0>;

		clocks = <&clock_disp PCLK_DECON_INT>,

			 <&clock_disp ACLK_DECON_INT>,

			 <&clock_disp SCLK_DECON_INT_ECLK>,

			 <&clock_disp SCLK_DECON_INT_EXTCLKPLL>;

		clock-names = "pclk_decon0", "aclk_decon0", "decon0_eclk",

				"decon0_vclk";

		status = "disabled";

	};

Board specific DT entry:

	decon@13930000 {

		pinctrl-0 = <&lcd_clk &pwm1_out>;

		pinctrl-names = "default";

		status = "okay";

	};

	a) mixer: Gate of Mixer IP bus clock.

	b) sclk_hdmi: HDMI Special clock, one of the two possible inputs of

               mixer mux.

	c) hdmi: Gate of HDMI IP bus clock, needed together with sclk_hdmi.

Example:

	  If M is selected the module will be called exynosdrm.

config DRM_EXYNOS_IOMMU

	bool "EXYNOS DRM IOMMU Support"

	bool

	depends on DRM_EXYNOS && EXYNOS_IOMMU && ARM_DMA_USE_IOMMU

	help

	  Choose this option if you want to use IOMMU feature for DRM.

config DRM_EXYNOS_DMABUF

	bool "EXYNOS DRM DMABUF"

	depends on DRM_EXYNOS

	help

	  Choose this option if you want to use DMABUF feature for DRM.

	default y

config DRM_EXYNOS_FIMD

	bool "Exynos DRM FIMD"

	help

	  Choose this option if you want to use Exynos FIMD for DRM.

config DRM_EXYNOS7_DECON

	bool "Exynos DRM DECON"

	depends on DRM_EXYNOS

	select FB_MODE_HELPERS

	help

	  Choose this option if you want to use Exynos DECON for DRM.

config DRM_EXYNOS_DPI

	bool "EXYNOS DRM parallel output support"

	depends on DRM_EXYNOS_FIMD

	depends on (DRM_EXYNOS_FIMD || DRM_EXYNOS7_DECON)

	select DRM_PANEL

	default n

	help

config DRM_EXYNOS_DSI

	bool "EXYNOS DRM MIPI-DSI driver support"

	depends on DRM_EXYNOS_FIMD

	depends on (DRM_EXYNOS_FIMD || DRM_EXYNOS7_DECON)

	select DRM_MIPI_DSI

	select DRM_PANEL

	default n

config DRM_EXYNOS_DP

	bool "EXYNOS DRM DP driver support"

	depends on DRM_EXYNOS_FIMD && ARCH_EXYNOS && (DRM_PTN3460=n || DRM_PTN3460=y || DRM_PTN3460=DRM_EXYNOS)

	depends on (DRM_EXYNOS_FIMD || DRM_EXYNOS7DECON) && ARCH_EXYNOS && (DRM_PTN3460=n || DRM_PTN3460=y || DRM_PTN3460=DRM_EXYNOS)

	default DRM_EXYNOS

	select DRM_PANEL

	help

exynosdrm-y := exynos_drm_drv.o exynos_drm_encoder.o \

		exynos_drm_crtc.o exynos_drm_fbdev.o exynos_drm_fb.o \

		exynos_drm_buf.o exynos_drm_gem.o exynos_drm_core.o \

		exynos_drm_plane.o

		exynos_drm_plane.o exynos_drm_dmabuf.o

exynosdrm-$(CONFIG_DRM_EXYNOS_IOMMU) += exynos_drm_iommu.o

exynosdrm-$(CONFIG_DRM_EXYNOS_DMABUF) += exynos_drm_dmabuf.o

exynosdrm-$(CONFIG_DRM_EXYNOS_FIMD)	+= exynos_drm_fimd.o

exynosdrm-$(CONFIG_DRM_EXYNOS7_DECON)	+= exynos7_drm_decon.o

exynosdrm-$(CONFIG_DRM_EXYNOS_DPI)	+= exynos_drm_dpi.o

exynosdrm-$(CONFIG_DRM_EXYNOS_DSI)	+= exynos_drm_dsi.o

exynosdrm-$(CONFIG_DRM_EXYNOS_DP)	+= exynos_dp_core.o exynos_dp_reg.o