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Commit aa075b0f authored by Christoffer Dall's avatar Christoffer Dall Committed by Marc Zyngier
Browse files

KVM: arm/arm64: vgic: Keep track of implementation revision 



As we are about to tweak implementation aspects of the VGIC emulation,
while still preserving some level of backwards compatibility support,
add a field to keep track of the implementation revision field which is
reported to the VM and to userspace.

Reviewed-by: default avatarAndrew Jones <drjones@redhat.com>
Signed-off-by: default avatarChristoffer Dall <christoffer.dall@arm.com>
Signed-off-by: default avatarMarc Zyngier <marc.zyngier@arm.com>
parent a2dca217

include/kvm/arm_vgic.h

+3 −0
Original line number Diff line number Diff line
@@ -217,6 +217,9 @@ struct vgic_dist { 
	/* vGIC model the kernel emulates for the guest (GICv2 or GICv3) */

	u32			vgic_model;



	/* Implementation revision as reported in the GICD_IIDR */

	u32			implementation_rev;



	/* Do injected MSIs require an additional device ID? */

	bool			msis_require_devid;

virt/kvm/arm/vgic/vgic-init.c

+1 −0
Original line number Diff line number Diff line
@@ -298,6 +298,7 @@ int vgic_init(struct kvm *kvm) 


	vgic_debug_init(kvm);



	dist->implementation_rev = 0;

	dist->initialized = true;



out:

virt/kvm/arm/vgic/vgic-mmio-v2.c

+4 −2
Original line number Diff line number Diff line
@@ -25,19 +25,21 @@ 
static unsigned long vgic_mmio_read_v2_misc(struct kvm_vcpu *vcpu,

					    gpa_t addr, unsigned int len)

{

	struct vgic_dist *vgic = &vcpu->kvm->arch.vgic;

	u32 value;



	switch (addr & 0x0c) {

	case GIC_DIST_CTRL:

		value = vcpu->kvm->arch.vgic.enabled ? GICD_ENABLE : 0;

		value = vgic->enabled ? GICD_ENABLE : 0;

		break;

	case GIC_DIST_CTR:

		value = vcpu->kvm->arch.vgic.nr_spis + VGIC_NR_PRIVATE_IRQS;

		value = vgic->nr_spis + VGIC_NR_PRIVATE_IRQS;

		value = (value >> 5) - 1;

		value |= (atomic_read(&vcpu->kvm->online_vcpus) - 1) << 5;

		break;

	case GIC_DIST_IIDR:

		value = (PRODUCT_ID_KVM << GICD_IIDR_PRODUCT_ID_SHIFT) |

			(vgic->implementation_rev << GICD_IIDR_REVISION_SHIFT) |

			(IMPLEMENTER_ARM << GICD_IIDR_IMPLEMENTER_SHIFT);

		break;

	default:

virt/kvm/arm/vgic/vgic-mmio-v3.c

+4 −2
Original line number Diff line number Diff line
@@ -62,16 +62,17 @@ bool vgic_supports_direct_msis(struct kvm *kvm) 
static unsigned long vgic_mmio_read_v3_misc(struct kvm_vcpu *vcpu,

					    gpa_t addr, unsigned int len)

{

	struct vgic_dist *vgic = &vcpu->kvm->arch.vgic;

	u32 value = 0;



	switch (addr & 0x0c) {

	case GICD_CTLR:

		if (vcpu->kvm->arch.vgic.enabled)

		if (vgic->enabled)

			value |= GICD_CTLR_ENABLE_SS_G1;

		value |= GICD_CTLR_ARE_NS | GICD_CTLR_DS;

		break;

	case GICD_TYPER:

		value = vcpu->kvm->arch.vgic.nr_spis + VGIC_NR_PRIVATE_IRQS;

		value = vgic->nr_spis + VGIC_NR_PRIVATE_IRQS;

		value = (value >> 5) - 1;

		if (vgic_has_its(vcpu->kvm)) {

			value |= (INTERRUPT_ID_BITS_ITS - 1) << 19;
@@ -82,6 +83,7 @@ static unsigned long vgic_mmio_read_v3_misc(struct kvm_vcpu *vcpu, 
		break;

	case GICD_IIDR:

		value = (PRODUCT_ID_KVM << GICD_IIDR_PRODUCT_ID_SHIFT) |

			(vgic->implementation_rev << GICD_IIDR_REVISION_SHIFT) |

			(IMPLEMENTER_ARM << GICD_IIDR_IMPLEMENTER_SHIFT);

		break;

	default: