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Commit a88b5f38 authored by Boris Brezillon's avatar Boris Brezillon
Browse files

Merge tag 'nand/for-4.17' of git://git.infradead.org/linux-mtd into mtd/next 

Core changes:
* Prepare arrival of the SPI NAND subsystem by implementing a generic
  (interface-agnostic) layer to ease manipulation of NAND devices
* Move onenand code base to the drivers/mtd/nand/ dir
* Rework timing mode selection
* Provide a generic way for NAND chip drivers to flag a specific
  GET/SET FEATURE operation as supported/unsupported
* Stop embedding ONFI/JEDEC param page in nand_chip

Driver changes:
* Rework/cleanup of the mxc driver
* Various cleanups in the vf610 driver
* Migrate the fsmc and vf610 to ->exec_op()
* Get rid of the pxa driver (replaced by marvell_nand)
* Support ->setup_data_interface() in the GPMI driver
* Fix probe error path in several drivers
* Remove support for unused hw_syndrome mode in sunxi_nand
* Various minor improvements
parents 7c0ed565 097ccca7

.mailmap

+4 −3
Original line number Original line Diff line number Diff line
@@ -33,9 +33,9 @@ Axel Lin <axel.lin@gmail.com> 
Ben Gardner <bgardner@wabtec.com>

Ben Gardner <bgardner@wabtec.com>

Ben M Cahill <ben.m.cahill@intel.com>

Ben M Cahill <ben.m.cahill@intel.com>

Björn Steinbrink <B.Steinbrink@gmx.de>

Björn Steinbrink <B.Steinbrink@gmx.de>

Boris Brezillon <boris.brezillon@free-electrons.com>

Boris Brezillon <boris.brezillon@bootlin.com> <boris.brezillon@free-electrons.com>

Boris Brezillon <boris.brezillon@free-electrons.com> <b.brezillon.dev@gmail.com>

Boris Brezillon <boris.brezillon@bootlin.com> <b.brezillon.dev@gmail.com>

Boris Brezillon <boris.brezillon@free-electrons.com> <b.brezillon@overkiz.com>

Boris Brezillon <boris.brezillon@bootlin.com> <b.brezillon@overkiz.com>

Brian Avery <b.avery@hp.com>

Brian Avery <b.avery@hp.com>

Brian King <brking@us.ibm.com>

Brian King <brking@us.ibm.com>

Christoph Hellwig <hch@lst.de>

Christoph Hellwig <hch@lst.de>
@@ -126,6 +126,7 @@ Mayuresh Janorkar <mayur@ti.com> 
Michael Buesch <m@bues.ch>

Michael Buesch <m@bues.ch>

Michel Dänzer <michel@tungstengraphics.com>

Michel Dänzer <michel@tungstengraphics.com>

Miodrag Dinic <miodrag.dinic@mips.com> <miodrag.dinic@imgtec.com>

Miodrag Dinic <miodrag.dinic@mips.com> <miodrag.dinic@imgtec.com>

Miquel Raynal <miquel.raynal@bootlin.com> <miquel.raynal@free-electrons.com>

Mitesh shah <mshah@teja.com>

Mitesh shah <mshah@teja.com>

Mohit Kumar <mohit.kumar@st.com> <mohit.kumar.dhaka@gmail.com>

Mohit Kumar <mohit.kumar@st.com> <mohit.kumar.dhaka@gmail.com>

Morten Welinder <terra@gnome.org>

Morten Welinder <terra@gnome.org>

Documentation/arm/Samsung-S3C24XX/S3C2412.txt

+1 −1
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@@ -46,7 +46,7 @@ NAND 
----

----





  The NAND hardware is similar to the S3C2440, and is supported by the

  The NAND hardware is similar to the S3C2440, and is supported by the

  s3c2410 driver in the drivers/mtd/nand directory.

  s3c2410 driver in the drivers/mtd/nand/raw directory.









USB Host

USB Host

Documentation/devicetree/bindings/mtd/marvell-nand.txt

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@@ -14,7 +14,10 @@ Required properties: 
- #address-cells: shall be set to 1. Encode the NAND CS.

- #address-cells: shall be set to 1. Encode the NAND CS.

- #size-cells: shall be set to 0.

- #size-cells: shall be set to 0.

- interrupts: shall define the NAND controller interrupt.

- interrupts: shall define the NAND controller interrupt.

- clocks: shall reference the NAND controller clock.

- clocks: shall reference the NAND controller clocks, the second one is

  is only needed for the Armada 7K/8K SoCs

- clock-names: mandatory if there is a second clock, in this case there

  should be one clock named "core" and another one named "reg"

- marvell,system-controller: Set to retrieve the syscon node that handles

- marvell,system-controller: Set to retrieve the syscon node that handles

  NAND controller related registers (only required with the

  NAND controller related registers (only required with the

  "marvell,armada-8k-nand[-controller]" compatibles).

  "marvell,armada-8k-nand[-controller]" compatibles).

Documentation/devicetree/bindings/mtd/pxa3xx-nand.txt

deleted100644 → 0
+0 −50
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PXA3xx NAND DT bindings



Required properties:



 - compatible:		Should be set to one of the following:

			marvell,pxa3xx-nand

			marvell,armada370-nand

			marvell,armada-8k-nand

 - reg: 		The register base for the controller

 - interrupts:		The interrupt to map

 - #address-cells:	Set to <1> if the node includes partitions

 - marvell,system-controller: Set to retrieve the syscon node that handles

			NAND controller related registers (only required

			with marvell,armada-8k-nand compatible).



Optional properties:



 - dmas:			dma data channel, see dma.txt binding doc

 - marvell,nand-enable-arbiter:	Set to enable the bus arbiter

 - marvell,nand-keep-config:	Set to keep the NAND controller config as set

				by the bootloader

 - num-cs:			Number of chipselect lines to use

 - nand-on-flash-bbt: 		boolean to enable on flash bbt option if

				not present false

 - nand-ecc-strength:           number of bits to correct per ECC step

 - nand-ecc-step-size:          number of data bytes covered by a single ECC step



The following ECC strength and step size are currently supported:



 - nand-ecc-strength = <1>, nand-ecc-step-size = <512>

 - nand-ecc-strength = <4>, nand-ecc-step-size = <512>

 - nand-ecc-strength = <8>, nand-ecc-step-size = <512>



Example:



	nand0: nand@43100000 {

		compatible = "marvell,pxa3xx-nand";

		reg = <0x43100000 90>;

		interrupts = <45>;

		dmas = <&pdma 97 0>;

		dma-names = "data";

		#address-cells = <1>;



		marvell,nand-enable-arbiter;

		marvell,nand-keep-config;

		num-cs = <1>;



		/* partitions (optional) */

	};

Documentation/devicetree/bindings/mtd/sunxi-nand.txt

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@@ -24,8 +24,8 @@ Optional properties: 
- allwinner,rb : shall contain the native Ready/Busy ids.

- allwinner,rb : shall contain the native Ready/Busy ids.

 or

 or

- rb-gpios : shall contain the gpios used as R/B pins.

- rb-gpios : shall contain the gpios used as R/B pins.

- nand-ecc-mode : one of the supported ECC modes ("hw", "hw_syndrome", "soft",

- nand-ecc-mode : one of the supported ECC modes ("hw", "soft", "soft_bch" or

  "soft_bch" or "none")

		  "none")





see Documentation/devicetree/bindings/mtd/nand.txt for generic bindings.

see Documentation/devicetree/bindings/mtd/nand.txt for generic bindings.