Commit a87cd07b authored Mar 03, 2015 by Maxime Ripard Committed by Gregory CLEMENT Mar 17, 2015

ARM: mvebu: Enable Performance Monitor Unit on Armada XP/370 SoCs



The Armada 370 and XP SoCs have Cortex-A9 compatible CPUs, and with a
Performance Monitoring Unit.

Enable it so that we can have hardware-assisted perf support.

Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Acked-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>

parent 0c2d652f

arch/arm/boot/dts/armada-370-xp.dtsi

+5 −0

Original line number	Diff line number	Diff line
		@@ -73,6 +73,11 @@
		};
		};

		pmu {
		compatible = "arm,cortex-a9-pmu";
		interrupts-extended = <&mpic 3>;
		};

		soc {
		#address-cells = <2>;
		#size-cells = <1>;