Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit a6ec572b authored by Atul Gupta's avatar Atul Gupta Committed by Herbert Xu
Browse files

cxgb4: Add support for Inline IPSec Tx



Added Tx routine for ULD
- define interface for ULD Tx.

Export routines used for Tx data
- Routines common for data transmit are used by cxgb4 and chcr
  drivers.
- EXPORT routines enable transmit from chcr driver.

Signed-off-by: default avatarAtul Gupta <atul.gupta@chelsio.com>
Signed-off-by: default avatarGanesh Goudar <ganeshgr@chelsio.com>
Signed-off-by: default avatarHerbert Xu <herbert@gondor.apana.org.au>
parent 23eb61d3
Loading
Loading
Loading
Loading
+23 −0
Original line number Original line Diff line number Diff line
@@ -58,6 +58,13 @@
extern struct list_head adapter_list;
extern struct list_head adapter_list;
extern struct mutex uld_mutex;
extern struct mutex uld_mutex;


/* Suspend an Ethernet Tx queue with fewer available descriptors than this.
 * This is the same as calc_tx_descs() for a TSO packet with
 * nr_frags == MAX_SKB_FRAGS.
 */
#define ETHTXQ_STOP_THRES \
	(1 + DIV_ROUND_UP((3 * MAX_SKB_FRAGS) / 2 + (MAX_SKB_FRAGS & 1), 8))

enum {
enum {
	MAX_NPORTS	= 4,     /* max # of ports */
	MAX_NPORTS	= 4,     /* max # of ports */
	SERNUM_LEN	= 24,    /* Serial # length */
	SERNUM_LEN	= 24,    /* Serial # length */
@@ -564,6 +571,7 @@ enum { /* adapter flags */


enum {
enum {
	ULP_CRYPTO_LOOKASIDE = 1 << 0,
	ULP_CRYPTO_LOOKASIDE = 1 << 0,
	ULP_CRYPTO_IPSEC_INLINE = 1 << 1,
};
};


struct rx_sw_desc;
struct rx_sw_desc;
@@ -968,6 +976,11 @@ enum {
	SCHED_CLASS_RATEMODE_ABS = 1,   /* Kb/s */
	SCHED_CLASS_RATEMODE_ABS = 1,   /* Kb/s */
};
};


struct tx_sw_desc {                /* SW state per Tx descriptor */
	struct sk_buff *skb;
	struct ulptx_sgl *sgl;
};

/* Support for "sched_queue" command to allow one or more NIC TX Queues
/* Support for "sched_queue" command to allow one or more NIC TX Queues
 * to be bound to a TX Scheduling Class.
 * to be bound to a TX Scheduling Class.
 */
 */
@@ -1700,4 +1713,14 @@ void free_rspq_fl(struct adapter *adap, struct sge_rspq *rq, struct sge_fl *fl);
void free_tx_desc(struct adapter *adap, struct sge_txq *q,
void free_tx_desc(struct adapter *adap, struct sge_txq *q,
		  unsigned int n, bool unmap);
		  unsigned int n, bool unmap);
void free_txq(struct adapter *adap, struct sge_txq *q);
void free_txq(struct adapter *adap, struct sge_txq *q);
void cxgb4_reclaim_completed_tx(struct adapter *adap,
				struct sge_txq *q, bool unmap);
int cxgb4_map_skb(struct device *dev, const struct sk_buff *skb,
		  dma_addr_t *addr);
void cxgb4_inline_tx_skb(const struct sk_buff *skb, const struct sge_txq *q,
			 void *pos);
void cxgb4_write_sgl(const struct sk_buff *skb, struct sge_txq *q,
		     struct ulptx_sgl *sgl, u64 *end, unsigned int start,
		     const dma_addr_t *addr);
void cxgb4_ring_tx_db(struct adapter *adap, struct sge_txq *q, int n);
#endif /* __CXGB4_H__ */
#endif /* __CXGB4_H__ */
+2 −0
Original line number Original line Diff line number Diff line
@@ -3096,6 +3096,8 @@ static int chcr_show(struct seq_file *seq, void *v)
		   atomic_read(&adap->chcr_stats.error));
		   atomic_read(&adap->chcr_stats.error));
	seq_printf(seq, "Fallback: %10u \n",
	seq_printf(seq, "Fallback: %10u \n",
		   atomic_read(&adap->chcr_stats.fallback));
		   atomic_read(&adap->chcr_stats.fallback));
	seq_printf(seq, "IPSec PDU: %10u\n",
		   atomic_read(&adap->chcr_stats.ipsec_cnt));
	return 0;
	return 0;
}
}


+1 −1
Original line number Original line Diff line number Diff line
@@ -4096,7 +4096,7 @@ static int adap_init0(struct adapter *adap)
		} else {
		} else {
			adap->vres.ncrypto_fc = val[0];
			adap->vres.ncrypto_fc = val[0];
		}
		}
		adap->params.crypto |= ULP_CRYPTO_LOOKASIDE;
		adap->params.crypto = ntohs(caps_cmd.cryptocaps);
		adap->num_uld += 1;
		adap->num_uld += 1;
	}
	}
#undef FW_PARAM_PFVF
#undef FW_PARAM_PFVF
+1 −0
Original line number Original line Diff line number Diff line
@@ -637,6 +637,7 @@ static void uld_init(struct adapter *adap, struct cxgb4_lld_info *lld)
	lld->nchan = adap->params.nports;
	lld->nchan = adap->params.nports;
	lld->nports = adap->params.nports;
	lld->nports = adap->params.nports;
	lld->wr_cred = adap->params.ofldq_wr_cred;
	lld->wr_cred = adap->params.ofldq_wr_cred;
	lld->crypto = adap->params.crypto;
	lld->iscsi_iolen = MAXRXDATA_G(t4_read_reg(adap, TP_PARA_REG2_A));
	lld->iscsi_iolen = MAXRXDATA_G(t4_read_reg(adap, TP_PARA_REG2_A));
	lld->iscsi_tagmask = t4_read_reg(adap, ULP_RX_ISCSI_TAGMASK_A);
	lld->iscsi_tagmask = t4_read_reg(adap, ULP_RX_ISCSI_TAGMASK_A);
	lld->iscsi_pgsz_order = t4_read_reg(adap, ULP_RX_ISCSI_PSZ_A);
	lld->iscsi_pgsz_order = t4_read_reg(adap, ULP_RX_ISCSI_PSZ_A);
+3 −0
Original line number Original line Diff line number Diff line
@@ -297,6 +297,7 @@ struct chcr_stats_debug {
	atomic_t complete;
	atomic_t complete;
	atomic_t error;
	atomic_t error;
	atomic_t fallback;
	atomic_t fallback;
	atomic_t ipsec_cnt;
};
};


#define OCQ_WIN_OFFSET(pdev, vres) \
#define OCQ_WIN_OFFSET(pdev, vres) \
@@ -322,6 +323,7 @@ struct cxgb4_lld_info {
	unsigned char wr_cred;               /* WR 16-byte credits */
	unsigned char wr_cred;               /* WR 16-byte credits */
	unsigned char adapter_type;          /* type of adapter */
	unsigned char adapter_type;          /* type of adapter */
	unsigned char fw_api_ver;            /* FW API version */
	unsigned char fw_api_ver;            /* FW API version */
	unsigned char crypto;                /* crypto support */
	unsigned int fw_vers;                /* FW version */
	unsigned int fw_vers;                /* FW version */
	unsigned int iscsi_iolen;            /* iSCSI max I/O length */
	unsigned int iscsi_iolen;            /* iSCSI max I/O length */
	unsigned int cclk_ps;                /* Core clock period in psec */
	unsigned int cclk_ps;                /* Core clock period in psec */
@@ -370,6 +372,7 @@ struct cxgb4_uld_info {
			      struct t4_lro_mgr *lro_mgr,
			      struct t4_lro_mgr *lro_mgr,
			      struct napi_struct *napi);
			      struct napi_struct *napi);
	void (*lro_flush)(struct t4_lro_mgr *);
	void (*lro_flush)(struct t4_lro_mgr *);
	int (*tx_handler)(struct sk_buff *skb, struct net_device *dev);
};
};


int cxgb4_register_uld(enum cxgb4_uld type, const struct cxgb4_uld_info *p);
int cxgb4_register_uld(enum cxgb4_uld type, const struct cxgb4_uld_info *p);
Loading