Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit a623f57c authored by Olof Johansson's avatar Olof Johansson
Browse files

Merge branch 'depends/gpio-devel' into next/soc 



Pulling in a newer version of the depend branch from the gpio tree,
since there was some randconfig breakage introduced at the version we
had, and we want to keep those things as bisectable as possible. It's
not bad enough to warrant a rebase though, so there'll be a window of
exposure to this.

* depends/gpio-devel:
  gpio: SPEAr: add spi chipselect control driver
  gpio: gpio-max710x: Support device tree probing
  gpio: twl4030: Use only TWL4030_MODULE_LED for LED configuration
  gpio: tegra: read output value when gpio is set in direction_out
  gpio: pca953x: Add compatible strings to gpio-pca953x driver
  gpio: pca953x: Register an IRQ domain
  gpio: mvebu: Set free callback for gpio_chip
  gpio: tegra: Drop exporting static functions
  gpio: tegra: Staticize non-exported symbols
  gpio: tegra: fix suspend/resume apis
  gpio-pch: Set parent dev for gpio chip
  gpio: em: Fix build errors

Signed-off-by: default avatarOlof Johansson <olof@lixom.net>
parents e9f6d135 b53bc281

Documentation/devicetree/bindings/gpio/spear_spics.txt

0 → 100644
+50 −0
Original line number Diff line number Diff line 
=== ST Microelectronics SPEAr SPI CS Driver ===



SPEAr platform provides a provision to control chipselects of ARM PL022 Prime

Cell spi controller through its system registers, which otherwise remains under

PL022 control. If chipselect remain under PL022 control then they would be

released as soon as transfer is over and TxFIFO becomes empty. This is not

desired by some of the device protocols above spi which expect (multiple)

transfers without releasing their chipselects.



Chipselects can be controlled by software by turning them as GPIOs. SPEAr

provides another interface through system registers through which software can

directly control each PL022 chipselect. Hence, it is natural for SPEAr to export

the control of this interface as gpio.



Required properties:



  * compatible: should be defined as "st,spear-spics-gpio"

  * reg: mentioning address range of spics controller

  * st-spics,peripcfg-reg: peripheral configuration register offset

  * st-spics,sw-enable-bit: bit offset to enable sw control

  * st-spics,cs-value-bit: bit offset to drive chipselect low or high

  * st-spics,cs-enable-mask: chip select number bit mask

  * st-spics,cs-enable-shift: chip select number program offset

  * gpio-controller: Marks the device node as gpio controller

  * #gpio-cells: should be 1 and will mention chip select number



All the above bit offsets are within peripcfg register.



Example:

-------

spics: spics@e0700000{

        compatible = "st,spear-spics-gpio";

        reg = <0xe0700000 0x1000>;

        st-spics,peripcfg-reg = <0x3b0>;

        st-spics,sw-enable-bit = <12>;

        st-spics,cs-value-bit = <11>;

        st-spics,cs-enable-mask = <3>;

        st-spics,cs-enable-shift = <8>;

        gpio-controller;

        #gpio-cells = <2>;

};





spi0: spi@e0100000 {

        status = "okay";

        num-cs = <3>;

        cs-gpios = <&gpio1 7 0>, <&spics 0>,

                   <&spics 1>;

	...

}

arch/arm/plat-spear/Kconfig

+1 −0
Original line number Diff line number Diff line
@@ -12,6 +12,7 @@ config ARCH_SPEAR13XX 
	bool "ST SPEAr13xx with Device Tree"

	select ARM_GIC

	select CPU_V7

	select GPIO_SPEAR_SPICS

	select HAVE_SMP

	select MIGHT_HAVE_CACHE_L2X0

	select PINCTRL

drivers/gpio/Kconfig

+7 −0
Original line number Diff line number Diff line
@@ -196,6 +196,13 @@ config GPIO_PXA 
	help

	  Say yes here to support the PXA GPIO device



config GPIO_SPEAR_SPICS

	bool "ST SPEAr13xx SPI Chip Select as GPIO support"

	depends on PLAT_SPEAR

	select GENERIC_IRQ_CHIP

	help

	  Say yes here to support ST SPEAr SPI Chip Select as GPIO device



config GPIO_STA2X11

	bool "STA2x11/ConneXt GPIO support"

	depends on MFD_STA2X11

drivers/gpio/Makefile

+1 −0
Original line number Diff line number Diff line
@@ -59,6 +59,7 @@ obj-$(CONFIG_PLAT_SAMSUNG) += gpio-samsung.o 
obj-$(CONFIG_ARCH_SA1100)	+= gpio-sa1100.o

obj-$(CONFIG_GPIO_SCH)		+= gpio-sch.o

obj-$(CONFIG_GPIO_SODAVILLE)	+= gpio-sodaville.o

obj-$(CONFIG_GPIO_SPEAR_SPICS)	+= gpio-spear-spics.o

obj-$(CONFIG_GPIO_STA2X11)	+= gpio-sta2x11.o

obj-$(CONFIG_GPIO_STMPE)	+= gpio-stmpe.o

obj-$(CONFIG_GPIO_STP_XWAY)	+= gpio-stp-xway.o

drivers/gpio/gpio-em.c

+3 −3
Original line number Diff line number Diff line
@@ -302,8 +302,8 @@ static int __devinit em_gio_probe(struct platform_device *pdev) 
	p->irq_domain = irq_domain_add_linear(pdev->dev.of_node,

					      pdata->number_of_pins,

					      &em_gio_irq_domain_ops, p);

	if (!p->irq_domain)

		err = -ENXIO;

	if (!p->irq_domain) {

		ret = -ENXIO;

		dev_err(&pdev->dev, "cannot initialize irq domain\n");

		goto err3;

	}
@@ -358,7 +358,7 @@ static int __devexit em_gio_remove(struct platform_device *pdev) 


	free_irq(irq[1]->start, pdev);

	free_irq(irq[0]->start, pdev);

	em_gio_irq_domain_cleanup(p);

	irq_domain_remove(p->irq_domain);

	iounmap(p->base1);

	iounmap(p->base0);

	kfree(p);