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Commit a5db5060 authored by Aneesh Kumar K.V's avatar Aneesh Kumar K.V Committed by Michael Ellerman
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powerpc/mm/hash: hard disable irq in the SLB insert path 



When inserting SLB entries for EA above 512TB, we need to hard disable irq.
This will make sure we don't take a PMU interrupt that can possibly touch
user space address via a stack dump. To prevent this, we need to hard disable
the interrupt.

Also add a comment explaining why we don't need context synchronizing isync
with slbmte.

Fixes: f384796c ("powerpc/mm: Add support for handling > 512TB address in SLB miss")
Signed-off-by: default avatarAneesh Kumar K.V <aneesh.kumar@linux.ibm.com>
Signed-off-by: default avatarMichael Ellerman <mpe@ellerman.id.au>
parent ed515b68

arch/powerpc/mm/slb.c

+13 −0
Original line number Diff line number Diff line
@@ -352,6 +352,14 @@ static void insert_slb_entry(unsigned long vsid, unsigned long ea, 
	/*

	 * We are irq disabled, hence should be safe to access PACA.

	 */

	VM_WARN_ON(!irqs_disabled());



	/*

	 * We can't take a PMU exception in the following code, so hard

	 * disable interrupts.

	 */

	hard_irq_disable();



	index = get_paca()->stab_rr;



	/*
@@ -369,6 +377,11 @@ static void insert_slb_entry(unsigned long vsid, unsigned long ea, 
		    ((unsigned long) ssize << SLB_VSID_SSIZE_SHIFT);

	esid_data = mk_esid_data(ea, ssize, index);



	/*

	 * No need for an isync before or after this slbmte. The exception

	 * we enter with and the rfid we exit with are context synchronizing.

	 * Also we only handle user segments here.

	 */

	asm volatile("slbmte %0, %1" : : "r" (vsid_data), "r" (esid_data)

		     : "memory");