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Commit a59670a4 authored by Per Forlin's avatar Per Forlin Committed by Dan Williams
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DMAENGINE: Set burst size for phy and log chans in ste_dma40 dev_control 



Set burst for physical or logical channels respectively.
Convert the values in dma_cfg to dma reg bits
for physical or logical channels.

Signed-off-by: default avatarPer Forlin <per.forlin@stericsson.com>
Signed-off-by: default avatarLinus Walleij <linus.walleij@stericsson.com>
Signed-off-by: default avatarDan Williams <dan.j.williams@intel.com>
parent 819504f4

drivers/dma/ste_dma40.c

+26 −8
Original line number Diff line number Diff line
@@ -2246,6 +2246,7 @@ static void d40_set_runtime_config(struct dma_chan *chan, 
		return;

	}



	if (d40c->log_num != D40_PHY_CHAN) {

		if (config_maxburst >= 16)

			psize = STEDMA40_PSIZE_LOG_16;

		else if (config_maxburst >= 8)
@@ -2254,6 +2255,16 @@ static void d40_set_runtime_config(struct dma_chan *chan, 
			psize = STEDMA40_PSIZE_LOG_4;

		else

			psize = STEDMA40_PSIZE_LOG_1;

	} else {

		if (config_maxburst >= 16)

			psize = STEDMA40_PSIZE_PHY_16;

		else if (config_maxburst >= 8)

			psize = STEDMA40_PSIZE_PHY_8;

		else if (config_maxburst >= 4)

			psize = STEDMA40_PSIZE_PHY_4;

		else

			psize = STEDMA40_PSIZE_PHY_1;

	}



	/* Set up all the endpoint configs */

	cfg->src_info.data_width = addr_width;
@@ -2265,6 +2276,13 @@ static void d40_set_runtime_config(struct dma_chan *chan, 
	cfg->dst_info.endianess = STEDMA40_LITTLE_ENDIAN;

	cfg->dst_info.flow_ctrl = STEDMA40_NO_FLOW_CTRL;



	/* Fill in register values */

	if (d40c->log_num != D40_PHY_CHAN)

		d40_log_cfg(cfg, &d40c->log_def.lcsp1, &d40c->log_def.lcsp3);

	else

		d40_phy_cfg(cfg, &d40c->src_def_cfg,

			    &d40c->dst_def_cfg, false);



	/* These settings will take precedence later */

	d40c->runtime_addr = config_addr;

	d40c->runtime_direction = config->direction;