e1000e: add support for 82577/82578 GbE LOM parts (a4f58f54) · Commits · e / devices / android_kernel_teracube_emerald

drivers/net/e1000e/82571.c

+2 −0

Original line number	Original line	Diff line number	Diff line
	@@ -1587,6 +1587,7 @@ static void e1000_clear_hw_cntrs_82571(struct e1000_hw *hw)
	static struct e1000_mac_operations e82571_mac_ops = {		static struct e1000_mac_operations e82571_mac_ops = {
	/* .check_mng_mode: mac type dependent */		/* .check_mng_mode: mac type dependent */
	/* .check_for_link: media type dependent */		/* .check_for_link: media type dependent */
			.id_led_init = e1000e_id_led_init,
	.cleanup_led = e1000e_cleanup_led_generic,		.cleanup_led = e1000e_cleanup_led_generic,
	.clear_hw_cntrs = e1000_clear_hw_cntrs_82571,		.clear_hw_cntrs = e1000_clear_hw_cntrs_82571,
	.get_bus_info = e1000e_get_bus_info_pcie,		.get_bus_info = e1000e_get_bus_info_pcie,
	@@ -1598,6 +1599,7 @@ static struct e1000_mac_operations e82571_mac_ops = {
	.init_hw = e1000_init_hw_82571,		.init_hw = e1000_init_hw_82571,
	.setup_link = e1000_setup_link_82571,		.setup_link = e1000_setup_link_82571,
	/* .setup_physical_interface: media type dependent */		/* .setup_physical_interface: media type dependent */
			.setup_led = e1000e_setup_led_generic,
	};		};

	static struct e1000_phy_operations e82_phy_ops_igp = {		static struct e1000_phy_operations e82_phy_ops_igp = {

drivers/net/e1000e/defines.h

+21 −0

Original line number	Original line	Diff line number	Diff line
	@@ -56,6 +56,7 @@
	/* Wake Up Control */		/* Wake Up Control */
	#define E1000_WUC_APME 0x00000001 /* APM Enable */		#define E1000_WUC_APME 0x00000001 /* APM Enable */
	#define E1000_WUC_PME_EN 0x00000002 /* PME Enable */		#define E1000_WUC_PME_EN 0x00000002 /* PME Enable */
			#define E1000_WUC_PHY_WAKE 0x00000100 /* if PHY supports wakeup */

	/* Wake Up Filter Control */		/* Wake Up Filter Control */
	#define E1000_WUFC_LNKC 0x00000001 /* Link Status Change Wakeup Enable */		#define E1000_WUFC_LNKC 0x00000001 /* Link Status Change Wakeup Enable */
	@@ -65,6 +66,13 @@
	#define E1000_WUFC_BC 0x00000010 /* Broadcast Wakeup Enable */		#define E1000_WUFC_BC 0x00000010 /* Broadcast Wakeup Enable */
	#define E1000_WUFC_ARP 0x00000020 /* ARP Request Packet Wakeup Enable */		#define E1000_WUFC_ARP 0x00000020 /* ARP Request Packet Wakeup Enable */

			/* Wake Up Status */
			#define E1000_WUS_LNKC E1000_WUFC_LNKC
			#define E1000_WUS_MAG E1000_WUFC_MAG
			#define E1000_WUS_EX E1000_WUFC_EX
			#define E1000_WUS_MC E1000_WUFC_MC
			#define E1000_WUS_BC E1000_WUFC_BC

	/* Extended Device Control */		/* Extended Device Control */
	#define E1000_CTRL_EXT_SDP7_DATA 0x00000080 /* Value of SW Definable Pin 7 */		#define E1000_CTRL_EXT_SDP7_DATA 0x00000080 /* Value of SW Definable Pin 7 */
	#define E1000_CTRL_EXT_EE_RST 0x00002000 /* Reinitialize from EEPROM */		#define E1000_CTRL_EXT_EE_RST 0x00002000 /* Reinitialize from EEPROM */
	@@ -77,6 +85,7 @@
	#define E1000_CTRL_EXT_IAME 0x08000000 /* Interrupt acknowledge Auto-mask */		#define E1000_CTRL_EXT_IAME 0x08000000 /* Interrupt acknowledge Auto-mask */
	#define E1000_CTRL_EXT_INT_TIMER_CLR 0x20000000 /* Clear Interrupt timers after IMS clear */		#define E1000_CTRL_EXT_INT_TIMER_CLR 0x20000000 /* Clear Interrupt timers after IMS clear */
	#define E1000_CTRL_EXT_PBA_CLR 0x80000000 /* PBA Clear */		#define E1000_CTRL_EXT_PBA_CLR 0x80000000 /* PBA Clear */
			#define E1000_CTRL_EXT_PHYPDEN 0x00100000

	/* Receive Descriptor bit definitions */		/* Receive Descriptor bit definitions */
	#define E1000_RXD_STAT_DD 0x01 /* Descriptor Done */		#define E1000_RXD_STAT_DD 0x01 /* Descriptor Done */
	@@ -140,6 +149,7 @@
	#define E1000_RCTL_DTYP_PS 0x00000400 /* Packet Split descriptor */		#define E1000_RCTL_DTYP_PS 0x00000400 /* Packet Split descriptor */
	#define E1000_RCTL_RDMTS_HALF 0x00000000 /* Rx desc min threshold size */		#define E1000_RCTL_RDMTS_HALF 0x00000000 /* Rx desc min threshold size */
	#define E1000_RCTL_MO_SHIFT 12 /* multicast offset shift */		#define E1000_RCTL_MO_SHIFT 12 /* multicast offset shift */
			#define E1000_RCTL_MO_3 0x00003000 /* multicast offset 15:4 */
	#define E1000_RCTL_BAM 0x00008000 /* broadcast enable */		#define E1000_RCTL_BAM 0x00008000 /* broadcast enable */
	/* these buffer sizes are valid if E1000_RCTL_BSEX is 0 */		/* these buffer sizes are valid if E1000_RCTL_BSEX is 0 */
	#define E1000_RCTL_SZ_2048 0x00000000 /* Rx buffer size 2048 */		#define E1000_RCTL_SZ_2048 0x00000000 /* Rx buffer size 2048 */
	@@ -153,6 +163,7 @@
	#define E1000_RCTL_VFE 0x00040000 /* vlan filter enable */		#define E1000_RCTL_VFE 0x00040000 /* vlan filter enable */
	#define E1000_RCTL_CFIEN 0x00080000 /* canonical form enable */		#define E1000_RCTL_CFIEN 0x00080000 /* canonical form enable */
	#define E1000_RCTL_CFI 0x00100000 /* canonical form indicator */		#define E1000_RCTL_CFI 0x00100000 /* canonical form indicator */
			#define E1000_RCTL_PMCF 0x00800000 /* pass MAC control frames */
	#define E1000_RCTL_BSEX 0x02000000 /* Buffer size extension */		#define E1000_RCTL_BSEX 0x02000000 /* Buffer size extension */
	#define E1000_RCTL_SECRC 0x04000000 /* Strip Ethernet CRC */		#define E1000_RCTL_SECRC 0x04000000 /* Strip Ethernet CRC */

	@@ -255,11 +266,16 @@
	#define AUTONEG_ADVERTISE_SPEED_DEFAULT E1000_ALL_SPEED_DUPLEX		#define AUTONEG_ADVERTISE_SPEED_DEFAULT E1000_ALL_SPEED_DUPLEX

	/* LED Control */		/* LED Control */
			#define E1000_PHY_LED0_MODE_MASK 0x00000007
			#define E1000_PHY_LED0_IVRT 0x00000008
			#define E1000_PHY_LED0_MASK 0x0000001F

	#define E1000_LEDCTL_LED0_MODE_MASK 0x0000000F		#define E1000_LEDCTL_LED0_MODE_MASK 0x0000000F
	#define E1000_LEDCTL_LED0_MODE_SHIFT 0		#define E1000_LEDCTL_LED0_MODE_SHIFT 0
	#define E1000_LEDCTL_LED0_IVRT 0x00000040		#define E1000_LEDCTL_LED0_IVRT 0x00000040
	#define E1000_LEDCTL_LED0_BLINK 0x00000080		#define E1000_LEDCTL_LED0_BLINK 0x00000080

			#define E1000_LEDCTL_MODE_LINK_UP 0x2
	#define E1000_LEDCTL_MODE_LED_ON 0xE		#define E1000_LEDCTL_MODE_LED_ON 0xE
	#define E1000_LEDCTL_MODE_LED_OFF 0xF		#define E1000_LEDCTL_MODE_LED_OFF 0xF

	@@ -676,6 +692,8 @@
	#define IFE_C_E_PHY_ID 0x02A80310		#define IFE_C_E_PHY_ID 0x02A80310
	#define BME1000_E_PHY_ID 0x01410CB0		#define BME1000_E_PHY_ID 0x01410CB0
	#define BME1000_E_PHY_ID_R2 0x01410CB1		#define BME1000_E_PHY_ID_R2 0x01410CB1
			#define I82577_E_PHY_ID 0x01540050
			#define I82578_E_PHY_ID 0x004DD040

	/* M88E1000 Specific Registers */		/* M88E1000 Specific Registers */
	#define M88E1000_PHY_SPEC_CTRL 0x10 /* PHY Specific Control Register */		#define M88E1000_PHY_SPEC_CTRL 0x10 /* PHY Specific Control Register */
	@@ -729,6 +747,9 @@
	#define M88EC018_EPSCR_DOWNSHIFT_COUNTER_MASK 0x0E00		#define M88EC018_EPSCR_DOWNSHIFT_COUNTER_MASK 0x0E00
	#define M88EC018_EPSCR_DOWNSHIFT_COUNTER_5X 0x0800		#define M88EC018_EPSCR_DOWNSHIFT_COUNTER_5X 0x0800

			#define I82578_EPSCR_DOWNSHIFT_ENABLE 0x0020
			#define I82578_EPSCR_DOWNSHIFT_COUNTER_MASK 0x001C

	/* BME1000 PHY Specific Control Register */		/* BME1000 PHY Specific Control Register */
	#define BME1000_PSCR_ENABLE_DOWNSHIFT 0x0800 /* 1 = enable downshift */		#define BME1000_PSCR_ENABLE_DOWNSHIFT 0x0800 /* 1 = enable downshift */

drivers/net/e1000e/e1000.h

+57 −0

Original line number	Original line	Diff line number	Diff line
	@@ -98,6 +98,49 @@ struct e1000_info;

	#define DEFAULT_JUMBO 9234		#define DEFAULT_JUMBO 9234

			/* BM/HV Specific Registers */
			#define BM_PORT_CTRL_PAGE 769

			#define PHY_UPPER_SHIFT 21
			#define BM_PHY_REG(page, reg) \
			(((reg) & MAX_PHY_REG_ADDRESS) \|\
			(((page) & 0xFFFF) << PHY_PAGE_SHIFT) \|\
			(((reg) & ~MAX_PHY_REG_ADDRESS) << (PHY_UPPER_SHIFT - PHY_PAGE_SHIFT)))

			/* PHY Wakeup Registers and defines */
			#define BM_RCTL PHY_REG(BM_WUC_PAGE, 0)
			#define BM_WUC PHY_REG(BM_WUC_PAGE, 1)
			#define BM_WUFC PHY_REG(BM_WUC_PAGE, 2)
			#define BM_WUS PHY_REG(BM_WUC_PAGE, 3)
			#define BM_RAR_L(_i) (BM_PHY_REG(BM_WUC_PAGE, 16 + ((_i) << 2)))
			#define BM_RAR_M(_i) (BM_PHY_REG(BM_WUC_PAGE, 17 + ((_i) << 2)))
			#define BM_RAR_H(_i) (BM_PHY_REG(BM_WUC_PAGE, 18 + ((_i) << 2)))
			#define BM_RAR_CTRL(_i) (BM_PHY_REG(BM_WUC_PAGE, 19 + ((_i) << 2)))
			#define BM_MTA(_i) (BM_PHY_REG(BM_WUC_PAGE, 128 + ((_i) << 1)))

			#define BM_RCTL_UPE 0x0001 /* Unicast Promiscuous Mode */
			#define BM_RCTL_MPE 0x0002 /* Multicast Promiscuous Mode */
			#define BM_RCTL_MO_SHIFT 3 /* Multicast Offset Shift */
			#define BM_RCTL_MO_MASK (3 << 3) /* Multicast Offset Mask */
			#define BM_RCTL_BAM 0x0020 /* Broadcast Accept Mode */
			#define BM_RCTL_PMCF 0x0040 /* Pass MAC Control Frames */
			#define BM_RCTL_RFCE 0x0080 /* Rx Flow Control Enable */

			#define HV_SCC_UPPER PHY_REG(778, 16) /* Single Collision Count */
			#define HV_SCC_LOWER PHY_REG(778, 17)
			#define HV_ECOL_UPPER PHY_REG(778, 18) /* Excessive Collision Count */
			#define HV_ECOL_LOWER PHY_REG(778, 19)
			#define HV_MCC_UPPER PHY_REG(778, 20) /* Multiple Collision Count */
			#define HV_MCC_LOWER PHY_REG(778, 21)
			#define HV_LATECOL_UPPER PHY_REG(778, 23) /* Late Collision Count */
			#define HV_LATECOL_LOWER PHY_REG(778, 24)
			#define HV_COLC_UPPER PHY_REG(778, 25) /* Collision Count */
			#define HV_COLC_LOWER PHY_REG(778, 26)
			#define HV_DC_UPPER PHY_REG(778, 27) /* Defer Count */
			#define HV_DC_LOWER PHY_REG(778, 28)
			#define HV_TNCRS_UPPER PHY_REG(778, 29) /* Transmit with no CRS */
			#define HV_TNCRS_LOWER PHY_REG(778, 30)

	enum e1000_boards {		enum e1000_boards {
	board_82571,		board_82571,
	board_82572,		board_82572,
	@@ -108,6 +151,7 @@ enum e1000_boards {
	board_ich8lan,		board_ich8lan,
	board_ich9lan,		board_ich9lan,
	board_ich10lan,		board_ich10lan,
			board_pchlan,
	};		};

	struct e1000_queue_stats {		struct e1000_queue_stats {
	@@ -305,6 +349,7 @@ struct e1000_adapter {
	unsigned int flags2;		unsigned int flags2;
	struct work_struct downshift_task;		struct work_struct downshift_task;
	struct work_struct update_phy_task;		struct work_struct update_phy_task;
			struct work_struct led_blink_task;
	};		};

	struct e1000_info {		struct e1000_info {
	@@ -355,6 +400,7 @@ struct e1000_info {

	/* CRC Stripping defines */		/* CRC Stripping defines */
	#define FLAG2_CRC_STRIPPING (1 << 0)		#define FLAG2_CRC_STRIPPING (1 << 0)
			#define FLAG2_HAS_PHY_WAKEUP (1 << 1)

	#define E1000_RX_DESC_PS(R, i) \		#define E1000_RX_DESC_PS(R, i) \
	(&(((union e1000_rx_desc_packet_split *)((R).desc))[i]))		(&(((union e1000_rx_desc_packet_split *)((R).desc))[i]))
	@@ -408,6 +454,7 @@ extern struct e1000_info e1000_82583_info;
	extern struct e1000_info e1000_ich8_info;		extern struct e1000_info e1000_ich8_info;
	extern struct e1000_info e1000_ich9_info;		extern struct e1000_info e1000_ich9_info;
	extern struct e1000_info e1000_ich10_info;		extern struct e1000_info e1000_ich10_info;
			extern struct e1000_info e1000_pch_info;
	extern struct e1000_info e1000_es2_info;		extern struct e1000_info e1000_es2_info;

	extern s32 e1000e_read_pba_num(struct e1000_hw hw, u32 pba_num);		extern s32 e1000e_read_pba_num(struct e1000_hw hw, u32 pba_num);
	@@ -429,6 +476,7 @@ extern void e1000e_disable_gig_wol_ich8lan(struct e1000_hw *hw);
	extern s32 e1000e_check_for_copper_link(struct e1000_hw *hw);		extern s32 e1000e_check_for_copper_link(struct e1000_hw *hw);
	extern s32 e1000e_check_for_fiber_link(struct e1000_hw *hw);		extern s32 e1000e_check_for_fiber_link(struct e1000_hw *hw);
	extern s32 e1000e_check_for_serdes_link(struct e1000_hw *hw);		extern s32 e1000e_check_for_serdes_link(struct e1000_hw *hw);
			extern s32 e1000e_setup_led_generic(struct e1000_hw *hw);
	extern s32 e1000e_cleanup_led_generic(struct e1000_hw *hw);		extern s32 e1000e_cleanup_led_generic(struct e1000_hw *hw);
	extern s32 e1000e_led_on_generic(struct e1000_hw *hw);		extern s32 e1000e_led_on_generic(struct e1000_hw *hw);
	extern s32 e1000e_led_off_generic(struct e1000_hw *hw);		extern s32 e1000e_led_off_generic(struct e1000_hw *hw);
	@@ -497,6 +545,15 @@ extern s32 e1000e_phy_reset_dsp(struct e1000_hw *hw);
	extern s32 e1000e_read_phy_reg_mdic(struct e1000_hw hw, u32 offset, u16 data);		extern s32 e1000e_read_phy_reg_mdic(struct e1000_hw hw, u32 offset, u16 data);
	extern s32 e1000e_write_phy_reg_mdic(struct e1000_hw *hw, u32 offset, u16 data);		extern s32 e1000e_write_phy_reg_mdic(struct e1000_hw *hw, u32 offset, u16 data);
	extern s32 e1000e_check_downshift(struct e1000_hw *hw);		extern s32 e1000e_check_downshift(struct e1000_hw *hw);
			extern s32 e1000_read_phy_reg_hv(struct e1000_hw hw, u32 offset, u16 data);
			extern s32 e1000_write_phy_reg_hv(struct e1000_hw *hw, u32 offset, u16 data);
			extern s32 e1000_set_mdio_slow_mode_hv(struct e1000_hw *hw, bool slow);
			extern s32 e1000_link_stall_workaround_hv(struct e1000_hw *hw);
			extern s32 e1000_copper_link_setup_82577(struct e1000_hw *hw);
			extern s32 e1000_check_polarity_82577(struct e1000_hw *hw);
			extern s32 e1000_get_phy_info_82577(struct e1000_hw *hw);
			extern s32 e1000_phy_force_speed_duplex_82577(struct e1000_hw *hw);
			extern s32 e1000_get_cable_length_82577(struct e1000_hw *hw);

	static inline s32 e1000_phy_hw_reset(struct e1000_hw *hw)		static inline s32 e1000_phy_hw_reset(struct e1000_hw *hw)
	{		{

drivers/net/e1000e/es2lan.c

+2 −0

Original line number	Original line	Diff line number	Diff line
	@@ -1366,6 +1366,7 @@ static void e1000_clear_hw_cntrs_80003es2lan(struct e1000_hw *hw)
	}		}

	static struct e1000_mac_operations es2_mac_ops = {		static struct e1000_mac_operations es2_mac_ops = {
			.id_led_init = e1000e_id_led_init,
	.check_mng_mode = e1000e_check_mng_mode_generic,		.check_mng_mode = e1000e_check_mng_mode_generic,
	/* check_for_link dependent on media type */		/* check_for_link dependent on media type */
	.cleanup_led = e1000e_cleanup_led_generic,		.cleanup_led = e1000e_cleanup_led_generic,
	@@ -1379,6 +1380,7 @@ static struct e1000_mac_operations es2_mac_ops = {
	.init_hw = e1000_init_hw_80003es2lan,		.init_hw = e1000_init_hw_80003es2lan,
	.setup_link = e1000e_setup_link,		.setup_link = e1000e_setup_link,
	/* setup_physical_interface dependent on media type */		/* setup_physical_interface dependent on media type */
			.setup_led = e1000e_setup_led_generic,
	};		};

	static struct e1000_phy_operations es2_phy_ops = {		static struct e1000_phy_operations es2_phy_ops = {

drivers/net/e1000e/ethtool.c

+23 −14

Original line number	Original line	Diff line number	Diff line
	@@ -776,6 +776,7 @@ static int e1000_reg_test(struct e1000_adapter adapter, u64 data)
	u32 after;		u32 after;
	u32 i;		u32 i;
	u32 toggle;		u32 toggle;
			u32 mask;

	/*		/*
	* The status register is Read Only, so a write should fail.		* The status register is Read Only, so a write should fail.
	@@ -788,16 +789,8 @@ static int e1000_reg_test(struct e1000_adapter adapter, u64 data)
	case e1000_80003es2lan:		case e1000_80003es2lan:
	toggle = 0x7FFFF3FF;		toggle = 0x7FFFF3FF;
	break;		break;
	case e1000_82573:
	case e1000_82574:
	case e1000_82583:
	case e1000_ich8lan:
	case e1000_ich9lan:
	case e1000_ich10lan:
	toggle = 0x7FFFF033;
	break;
	default:		default:
	toggle = 0xFFFFF833;		toggle = 0x7FFFF033;
	break;		break;
	}		}

	@@ -844,11 +837,18 @@ static int e1000_reg_test(struct e1000_adapter adapter, u64 data)
	REG_PATTERN_TEST(E1000_TXCW, 0xC000FFFF, 0x0000FFFF);		REG_PATTERN_TEST(E1000_TXCW, 0xC000FFFF, 0x0000FFFF);
	REG_PATTERN_TEST(E1000_TDBAL, 0xFFFFFFF0, 0xFFFFFFFF);		REG_PATTERN_TEST(E1000_TDBAL, 0xFFFFFFF0, 0xFFFFFFFF);
	REG_PATTERN_TEST(E1000_TIDV, 0x0000FFFF, 0x0000FFFF);		REG_PATTERN_TEST(E1000_TIDV, 0x0000FFFF, 0x0000FFFF);
			mask = 0x8003FFFF;
			switch (mac->type) {
			case e1000_ich10lan:
			case e1000_pchlan:
			mask \|= (1 << 18);
			break;
			default:
			break;
			}
	for (i = 0; i < mac->rar_entry_count; i++)		for (i = 0; i < mac->rar_entry_count; i++)
	REG_PATTERN_TEST_ARRAY(E1000_RA, ((i << 1) + 1),		REG_PATTERN_TEST_ARRAY(E1000_RA, ((i << 1) + 1),
	((mac->type == e1000_ich10lan) ?		mask, 0xFFFFFFFF);
	0x8007FFFF : 0x8003FFFF),
	0xFFFFFFFF);

	for (i = 0; i < mac->mta_reg_count; i++)		for (i = 0; i < mac->mta_reg_count; i++)
	REG_PATTERN_TEST_ARRAY(E1000_MTA, i, 0xFFFFFFFF, 0xFFFFFFFF);		REG_PATTERN_TEST_ARRAY(E1000_MTA, i, 0xFFFFFFFF, 0xFFFFFFFF);
	@@ -1786,15 +1786,22 @@ static int e1000_set_wol(struct net_device *netdev,
	/* bit defines for adapter->led_status */		/* bit defines for adapter->led_status */
	#define E1000_LED_ON 0		#define E1000_LED_ON 0

	static void e1000_led_blink_callback(unsigned long data)		static void e1000e_led_blink_task(struct work_struct *work)
	{		{
	struct e1000_adapter adapter = (struct e1000_adapter ) data;		struct e1000_adapter *adapter = container_of(work,
			struct e1000_adapter, led_blink_task);

	if (test_and_change_bit(E1000_LED_ON, &adapter->led_status))		if (test_and_change_bit(E1000_LED_ON, &adapter->led_status))
	adapter->hw.mac.ops.led_off(&adapter->hw);		adapter->hw.mac.ops.led_off(&adapter->hw);
	else		else
	adapter->hw.mac.ops.led_on(&adapter->hw);		adapter->hw.mac.ops.led_on(&adapter->hw);
			}

			static void e1000_led_blink_callback(unsigned long data)
			{
			struct e1000_adapter adapter = (struct e1000_adapter ) data;

			schedule_work(&adapter->led_blink_task);
	mod_timer(&adapter->blink_timer, jiffies + E1000_ID_INTERVAL);		mod_timer(&adapter->blink_timer, jiffies + E1000_ID_INTERVAL);
	}		}

	@@ -1807,7 +1814,9 @@ static int e1000_phys_id(struct net_device *netdev, u32 data)
	data = INT_MAX;		data = INT_MAX;

	if ((hw->phy.type == e1000_phy_ife) \|\|		if ((hw->phy.type == e1000_phy_ife) \|\|
			(hw->mac.type == e1000_pchlan) \|\|
	(hw->mac.type == e1000_82574)) {		(hw->mac.type == e1000_82574)) {
			INIT_WORK(&adapter->led_blink_task, e1000e_led_blink_task);
	if (!adapter->blink_timer.function) {		if (!adapter->blink_timer.function) {
	init_timer(&adapter->blink_timer);		init_timer(&adapter->blink_timer);
	adapter->blink_timer.function =		adapter->blink_timer.function =