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Commit a4b0d348 authored by Maxime Ripard's avatar Maxime Ripard Committed by Vinod Koul
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dmaengine: dw: Split device_control 



Split the device_control callback of the DesignWare DMA driver to make use
of the newly introduced callbacks, that will eventually be used to retrieve
slave capabilities.

Signed-off-by: default avatarMaxime Ripard <maxime.ripard@free-electrons.com>
Signed-off-by: default avatarVinod Koul <vinod.koul@intel.com>
parent 1d4c0b8c

drivers/dma/dw/core.c

+44 −38
Original line number Diff line number Diff line
@@ -955,8 +955,7 @@ static inline void convert_burst(u32 *maxburst) 
		*maxburst = 0;

}



static int

set_runtime_config(struct dma_chan *chan, struct dma_slave_config *sconfig)

static int dwc_config(struct dma_chan *chan, struct dma_slave_config *sconfig)

{

	struct dw_dma_chan *dwc = to_dw_dma_chan(chan);
@@ -973,16 +972,25 @@ set_runtime_config(struct dma_chan *chan, struct dma_slave_config *sconfig) 
	return 0;

}



static inline void dwc_chan_pause(struct dw_dma_chan *dwc)

static int dwc_pause(struct dma_chan *chan)

{

	u32 cfglo = channel_readl(dwc, CFG_LO);

	struct dw_dma_chan	*dwc = to_dw_dma_chan(chan);

	unsigned long		flags;

	unsigned int		count = 20;	/* timeout iterations */

	u32			cfglo;



	spin_lock_irqsave(&dwc->lock, flags);



	cfglo = channel_readl(dwc, CFG_LO);

	channel_writel(dwc, CFG_LO, cfglo | DWC_CFGL_CH_SUSP);

	while (!(channel_readl(dwc, CFG_LO) & DWC_CFGL_FIFO_EMPTY) && count--)

		udelay(2);



	dwc->paused = true;



	spin_unlock_irqrestore(&dwc->lock, flags);



	return 0;

}



static inline void dwc_chan_resume(struct dw_dma_chan *dwc)
@@ -994,22 +1002,11 @@ static inline void dwc_chan_resume(struct dw_dma_chan *dwc) 
	dwc->paused = false;

}



static int dwc_control(struct dma_chan *chan, enum dma_ctrl_cmd cmd,

		       unsigned long arg)

static int dwc_resume(struct dma_chan *chan)

{

	struct dw_dma_chan	*dwc = to_dw_dma_chan(chan);

	struct dw_dma		*dw = to_dw_dma(chan->device);

	struct dw_desc		*desc, *_desc;

	unsigned long		flags;

	LIST_HEAD(list);



	if (cmd == DMA_PAUSE) {

		spin_lock_irqsave(&dwc->lock, flags);



		dwc_chan_pause(dwc);



		spin_unlock_irqrestore(&dwc->lock, flags);

	} else if (cmd == DMA_RESUME) {

	if (!dwc->paused)

		return 0;
@@ -1018,7 +1015,18 @@ static int dwc_control(struct dma_chan *chan, enum dma_ctrl_cmd cmd, 
	dwc_chan_resume(dwc);



	spin_unlock_irqrestore(&dwc->lock, flags);

	} else if (cmd == DMA_TERMINATE_ALL) {



	return 0;

}



static int dwc_terminate_all(struct dma_chan *chan)

{

	struct dw_dma_chan	*dwc = to_dw_dma_chan(chan);

	struct dw_dma		*dw = to_dw_dma(chan->device);

	struct dw_desc		*desc, *_desc;

	unsigned long		flags;

	LIST_HEAD(list);



	spin_lock_irqsave(&dwc->lock, flags);



	clear_bit(DW_DMA_IS_SOFT_LLP, &dwc->flags);
@@ -1036,11 +1044,6 @@ static int dwc_control(struct dma_chan *chan, enum dma_ctrl_cmd cmd, 
	/* Flush all pending and queued descriptors */

	list_for_each_entry_safe(desc, _desc, &list, desc_node)

		dwc_descriptor_complete(dwc, desc, false);

	} else if (cmd == DMA_SLAVE_CONFIG) {

		return set_runtime_config(chan, (struct dma_slave_config *)arg);

	} else {

		return -ENXIO;

	}



	return 0;

}
@@ -1659,7 +1662,10 @@ int dw_dma_probe(struct dw_dma_chip *chip, struct dw_dma_platform_data *pdata) 
	dw->dma.device_prep_dma_memcpy = dwc_prep_dma_memcpy;



	dw->dma.device_prep_slave_sg = dwc_prep_slave_sg;

	dw->dma.device_control = dwc_control;

	dw->dma.device_config = dwc_config;

	dw->dma.device_pause = dwc_pause;

	dw->dma.device_resume = dwc_resume;

	dw->dma.device_terminate_all = dwc_terminate_all;



	dw->dma.device_tx_status = dwc_tx_status;

	dw->dma.device_issue_pending = dwc_issue_pending;