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Commit a4240d3a authored by Nishanth Menon's avatar Nishanth Menon Committed by Tony Lindgren
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ARM: dts: Add support for dra72-evm rev C (SR2.0) 



DRA72-EVM now has an upgrade to Rev C with SR2.0 silicon. As part of
this change, a few updates were factored in that were software
incompatible with previous board in few areas:
- We now use DP83867 ethernet phy instead of older DP838865 which fails
  in certain use cases.
- Two Ethernet ports now instead of the single one in rev B.
- polarities changed for certain pcf gpios
- Due to SoC phy current requirements, VDDA supplies are split between
 ldo3 and ldo2 (ldo2 was previously unused). NOTE: DSS (VDDA_VIDEO) is
 still supplied by ldo5, HDMI is now supplied by LDO2 instead of using
 LDO3.

NOTE: It does not make much sense to spin off a new board compatible
flag since there is no real benefit for the same.

Signed-off-by: default avatarNishanth Menon <nm@ti.com>
Signed-off-by: default avatarTony Lindgren <tony@atomide.com>
parent 1ae5762d

arch/arm/boot/dts/Makefile

+2 −1
Original line number Diff line number Diff line
@@ -530,7 +530,8 @@ dtb-$(CONFIG_SOC_DRA7XX) += \ 
	am57xx-sbc-am57x.dtb \

	am572x-idk.dtb \

	dra7-evm.dtb \

	dra72-evm.dtb

	dra72-evm.dtb \

	dra72-evm-revc.dtb

dtb-$(CONFIG_ARCH_ORION5X) += \

	orion5x-lacie-d2-network.dtb \

	orion5x-lacie-ethernet-disk-mini-v2.dtb \

arch/arm/boot/dts/dra72-evm-common.dtsi

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arch/arm/boot/dts/dra72-evm-revc.dts

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Original line number Diff line number Diff line 
/*

 * Copyright (C) 2016 Texas Instruments Incorporated - http://www.ti.com/

 *

 * This program is free software; you can redistribute it and/or modify

 * it under the terms of the GNU General Public License version 2 as

 * published by the Free Software Foundation.

 */

#include "dra72-evm-common.dtsi"

#include <dt-bindings/net/ti-dp83867.h>



/ {

	model = "TI DRA722 Rev C EVM";



	memory {

		device_type = "memory";

		reg = <0x0 0x80000000 0x0 0x80000000>; /* 2GB */

	};

};



&tps65917_regulators {

	ldo2_reg: ldo2 {

		/* LDO2_OUT --> VDDA_1V8_PHY2 */

		regulator-name = "ldo2";

		regulator-min-microvolt = <1800000>;

		regulator-max-microvolt = <1800000>;

		regulator-always-on;

		regulator-boot-on;

	};

};



&hdmi {

	vdda-supply = <&ldo2_reg>;

};



&pcf_gpio_21 {

	interrupt-parent = <&gpio3>;

	interrupts = <30 IRQ_TYPE_EDGE_FALLING>;

};



&mac {

	mode-gpios = <&pcf_gpio_21 4 GPIO_ACTIVE_LOW>,

		     <&pcf_hdmi 9 GPIO_ACTIVE_LOW>,	/* P11 */

		     <&pcf_hdmi 10 GPIO_ACTIVE_LOW>;	/* P12 */

	dual_emac;

};



&cpsw_emac0 {

	phy_id = <&davinci_mdio>, <2>;

	phy-mode = "rgmii-id";

	dual_emac_res_vlan = <1>;

};



&cpsw_emac1 {

	phy_id = <&davinci_mdio>, <3>;

	phy-mode = "rgmii-id";

	dual_emac_res_vlan = <2>;

};



&davinci_mdio {

	dp83867_0: ethernet-phy@2 {

		reg = <2>;

		ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>;

		ti,tx-internal-delay = <DP83867_RGMIIDCTL_1_NS>;

		ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_8_B_NIB>;

	};



	dp83867_1: ethernet-phy@3 {

		reg = <3>;

		ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>;

		ti,tx-internal-delay = <DP83867_RGMIIDCTL_1_NS>;

		ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_8_B_NIB>;

	};

};

arch/arm/boot/dts/dra72-evm.dts

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