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Commit a3b5655e authored by Fabrice Gasnier's avatar Fabrice Gasnier Committed by Jonathan Cameron
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iio: adc: stm32: fix stm32h7_adc_enable error handling 



Error handling in stm32h7_adc_enable routine doesn't unwind enable
sequence correctly. ADEN can only be cleared by hardware (e.g. by
writing one to ADDIS).
It's also better to clear ADRDY just after it's been set by hardware.

Fixes: 95e339b6 ("iio: adc: stm32: add support for STM32H7")

Signed-off-by: default avatarFabrice Gasnier <fabrice.gasnier@st.com>
Cc: <Stable@vger.kernel.org>
Signed-off-by: default avatarJonathan Cameron <Jonathan.Cameron@huawei.com>
parent e31b617d

drivers/iio/adc/stm32-adc.c

+4 −3
Original line number Diff line number Diff line
@@ -722,8 +722,6 @@ static int stm32h7_adc_enable(struct stm32_adc *adc) 
	int ret;

	u32 val;



	/* Clear ADRDY by writing one, then enable ADC */

	stm32_adc_set_bits(adc, STM32H7_ADC_ISR, STM32H7_ADRDY);

	stm32_adc_set_bits(adc, STM32H7_ADC_CR, STM32H7_ADEN);



	/* Poll for ADRDY to be set (after adc startup time) */
@@ -731,8 +729,11 @@ static int stm32h7_adc_enable(struct stm32_adc *adc) 
					   val & STM32H7_ADRDY,

					   100, STM32_ADC_TIMEOUT_US);

	if (ret) {

		stm32_adc_clr_bits(adc, STM32H7_ADC_CR, STM32H7_ADEN);

		stm32_adc_set_bits(adc, STM32H7_ADC_CR, STM32H7_ADDIS);

		dev_err(&indio_dev->dev, "Failed to enable ADC\n");

	} else {

		/* Clear ADRDY by writing one */

		stm32_adc_set_bits(adc, STM32H7_ADC_ISR, STM32H7_ADRDY);

	}



	return ret;