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Commit a2601d78 authored by Linus Torvalds's avatar Linus Torvalds
Browse files
Pull powerpc fixes from Michael Ellerman:
 "Some more powerpc fixes for 4.16. Apologies if this is a bit big at
  rc7, but they're all reasonably important fixes. None are actually for
  new code, so they aren't indicative of 4.16 being in bad shape from
  our point of view.

   - Fix missing AT_BASE_PLATFORM (in auxv) when we're using a new
     firmware interface for describing CPU features.

   - Fix lost pending interrupts due to a race in our interrupt
     soft-masking code.

   - A workaround for a nest MMU bug with TLB invalidations on Power9.

   - A workaround for broadcast TLB invalidations on Power9.

   - Fix a bug in our instruction SLB miss handler, when handling bad
     addresses (eg. >= TASK_SIZE), which could corrupt non-volatile user
     GPRs.

  Thanks to: Aneesh Kumar K.V, Balbir Singh, Benjamin Herrenschmidt,
  Nicholas Piggin"

* tag 'powerpc-4.16-6' of git://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux:
  powerpc/64s: Fix i-side SLB miss bad address handler saving nonvolatile GPRs
  powerpc/mm: Fixup tlbie vs store ordering issue on POWER9
  powerpc/mm/radix: Move the functions that does the actual tlbie closer
  powerpc/mm/radix: Remove unused code
  powerpc/mm: Workaround Nest MMU bug with TLB invalidations
  powerpc/mm: Add tracking of the number of coprocessors using a context
  powerpc/64s: Fix lost pending interrupt due to race causing lost update to irq_happened
  powerpc/64s: Fix NULL AT_BASE_PLATFORM when using DT CPU features
parents 616d8cf0 52396500
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+3 −0
Original line number Diff line number Diff line
@@ -87,6 +87,9 @@ typedef struct {
	/* Number of bits in the mm_cpumask */
	atomic_t active_cpus;

	/* Number of users of the external (Nest) MMU */
	atomic_t copros;

	/* NPU NMMU context */
	struct npu_context *npu_context;

+0 −3
Original line number Diff line number Diff line
@@ -47,9 +47,6 @@ extern void radix__flush_tlb_page_psize(struct mm_struct *mm, unsigned long vmad
#endif
extern void radix__flush_tlb_pwc(struct mmu_gather *tlb, unsigned long addr);
extern void radix__flush_tlb_collapsed_pmd(struct mm_struct *mm, unsigned long addr);
extern void radix__flush_tlb_lpid_va(unsigned long lpid, unsigned long gpa,
				     unsigned long page_size);
extern void radix__flush_tlb_lpid(unsigned long lpid);
extern void radix__flush_tlb_all(void);
extern void radix__flush_tlb_pte_p9_dd1(unsigned long old_pte, struct mm_struct *mm,
					unsigned long address);
+2 −1
Original line number Diff line number Diff line
@@ -203,6 +203,7 @@ static inline void cpu_feature_keys_init(void) { }
#define CPU_FTR_DAWR			LONG_ASM_CONST(0x0400000000000000)
#define CPU_FTR_DABRX			LONG_ASM_CONST(0x0800000000000000)
#define CPU_FTR_PMAO_BUG		LONG_ASM_CONST(0x1000000000000000)
#define CPU_FTR_P9_TLBIE_BUG		LONG_ASM_CONST(0x2000000000000000)
#define CPU_FTR_POWER9_DD1		LONG_ASM_CONST(0x4000000000000000)
#define CPU_FTR_POWER9_DD2_1		LONG_ASM_CONST(0x8000000000000000)

@@ -465,7 +466,7 @@ static inline void cpu_feature_keys_init(void) { }
	    CPU_FTR_CFAR | CPU_FTR_HVMODE | CPU_FTR_VMX_COPY | \
	    CPU_FTR_DBELL | CPU_FTR_HAS_PPR | CPU_FTR_DAWR | \
	    CPU_FTR_ARCH_207S | CPU_FTR_TM_COMP | CPU_FTR_ARCH_300 | \
	    CPU_FTR_PKEY)
	    CPU_FTR_PKEY | CPU_FTR_P9_TLBIE_BUG)
#define CPU_FTRS_POWER9_DD1 ((CPU_FTRS_POWER9 | CPU_FTR_POWER9_DD1) & \
			     (~CPU_FTR_SAO))
#define CPU_FTRS_POWER9_DD2_0 CPU_FTRS_POWER9
+13 −5
Original line number Diff line number Diff line
@@ -92,15 +92,23 @@ static inline void dec_mm_active_cpus(struct mm_struct *mm)
static inline void mm_context_add_copro(struct mm_struct *mm)
{
	/*
	 * On hash, should only be called once over the lifetime of
	 * the context, as we can't decrement the active cpus count
	 * and flush properly for the time being.
	 * If any copro is in use, increment the active CPU count
	 * in order to force TLB invalidations to be global as to
	 * propagate to the Nest MMU.
	 */
	if (atomic_inc_return(&mm->context.copros) == 1)
		inc_mm_active_cpus(mm);
}

static inline void mm_context_remove_copro(struct mm_struct *mm)
{
	int c;

	c = atomic_dec_if_positive(&mm->context.copros);

	/* Detect imbalance between add and remove */
	WARN_ON(c < 0);

	/*
	 * Need to broadcast a global flush of the full mm before
	 * decrementing active_cpus count, as the next TLBI may be
@@ -111,7 +119,7 @@ static inline void mm_context_remove_copro(struct mm_struct *mm)
	 * for the time being. Invalidations will remain global if
	 * used on hash.
	 */
	if (radix_enabled()) {
	if (c == 0 && radix_enabled()) {
		flush_all_mm(mm);
		dec_mm_active_cpus(mm);
	}
+6 −0
Original line number Diff line number Diff line
@@ -709,6 +709,9 @@ static __init void cpufeatures_cpu_quirks(void)
		cur_cpu_spec->cpu_features |= CPU_FTR_POWER9_DD1;
	else if ((version & 0xffffefff) == 0x004e0201)
		cur_cpu_spec->cpu_features |= CPU_FTR_POWER9_DD2_1;

	if ((version & 0xffff0000) == 0x004e0000)
		cur_cpu_spec->cpu_features |= CPU_FTR_P9_TLBIE_BUG;
}

static void __init cpufeatures_setup_finished(void)
@@ -720,6 +723,9 @@ static void __init cpufeatures_setup_finished(void)
		cur_cpu_spec->cpu_features |= CPU_FTR_HVMODE;
	}

	/* Make sure powerpc_base_platform is non-NULL */
	powerpc_base_platform = cur_cpu_spec->platform;

	system_registers.lpcr = mfspr(SPRN_LPCR);
	system_registers.hfscr = mfspr(SPRN_HFSCR);
	system_registers.fscr = mfspr(SPRN_FSCR);
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