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Commit 9f8fb5a2 authored by Christian König's avatar Christian König Committed by Alex Deucher
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drm/amdgpu: move preamble IB handling into common code



This fixes the handling which was completely broken when you
ad more than one preamble IB.

Signed-off-by: default avatarChristian König <christian.koenig@amd.com>
Reviewed-by: default avatarAlex Deucher <alexander.deucher@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 914f9e18
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+7 −1
Original line number Diff line number Diff line
@@ -125,6 +125,7 @@ int amdgpu_ib_schedule(struct amdgpu_ring *ring, unsigned num_ibs,
	struct fence *hwf;
	struct amdgpu_vm *vm = NULL;
	unsigned i, patch_offset = ~0;
	bool skip_preamble;

	int r = 0;

@@ -172,9 +173,14 @@ int amdgpu_ib_schedule(struct amdgpu_ring *ring, unsigned num_ibs,
	/* always set cond_exec_polling to CONTINUE */
	*ring->cond_exe_cpu_addr = 1;

	skip_preamble = ring->current_ctx == ctx;
	old_ctx = ring->current_ctx;
	for (i = 0; i < num_ibs; ++i) {
		ib = &ibs[i];

		/* drop preamble IBs if we don't have a context switch */
		if ((ib->flags & AMDGPU_IB_FLAG_PREAMBLE) && skip_preamble)
			continue;

		amdgpu_ring_emit_ib(ring, ib);
		ring->current_ctx = ctx;
	}
+0 −4
Original line number Diff line number Diff line
@@ -2036,10 +2036,6 @@ static void gfx_v7_0_ring_emit_ib_gfx(struct amdgpu_ring *ring,
	u32 header, control = 0;
	u32 next_rptr = ring->wptr + 5;

	/* drop the CE preamble IB for the same context */
	if ((ib->flags & AMDGPU_IB_FLAG_PREAMBLE) && !need_ctx_switch)
		return;

	if (need_ctx_switch)
		next_rptr += 2;

+0 −4
Original line number Diff line number Diff line
@@ -5652,10 +5652,6 @@ static void gfx_v8_0_ring_emit_ib_gfx(struct amdgpu_ring *ring,
	u32 header, control = 0;
	u32 next_rptr = ring->wptr + 5;

	/* drop the CE preamble IB for the same context */
	if ((ib->flags & AMDGPU_IB_FLAG_PREAMBLE) && !need_ctx_switch)
		return;

	if (need_ctx_switch)
		next_rptr += 2;