net: dsa: mv88e6xxx: rename smi_mutex to reg_lock

#include <net/switchdev.h>

#include "mv88e6xxx.h"

static void assert_smi_lock(struct mv88e6xxx_priv_state *ps)

static void assert_reg_lock(struct mv88e6xxx_priv_state *ps)

{

	if (unlikely(!mutex_is_locked(&ps->smi_mutex))) {

		dev_err(ps->dev, "SMI lock not held!\n");

	if (unlikely(!mutex_is_locked(&ps->reg_lock))) {

		dev_err(ps->dev, "Switch registers lock not held!\n");

		dump_stack();

	}

}

{

	int ret;

	assert_smi_lock(ps);

	assert_reg_lock(ps);

	ret = __mv88e6xxx_reg_read(ps->bus, ps->sw_addr, addr, reg);

	if (ret < 0)

{

	int ret;

	mutex_lock(&ps->smi_mutex);

	mutex_lock(&ps->reg_lock);

	ret = _mv88e6xxx_reg_read(ps, addr, reg);

	mutex_unlock(&ps->smi_mutex);

	mutex_unlock(&ps->reg_lock);

	return ret;

}

static int _mv88e6xxx_reg_write(struct mv88e6xxx_priv_state *ps, int addr,

				int reg, u16 val)

{

	assert_smi_lock(ps);

	assert_reg_lock(ps);

	dev_dbg(ps->dev, "-> addr: 0x%.2x reg: 0x%.2x val: 0x%.4x\n",

		addr, reg, val);

{

	int ret;

	mutex_lock(&ps->smi_mutex);

	mutex_lock(&ps->reg_lock);

	ret = _mv88e6xxx_reg_write(ps, addr, reg, val);

	mutex_unlock(&ps->smi_mutex);

	mutex_unlock(&ps->reg_lock);

	return ret;

}

	ps = container_of(ugly, struct mv88e6xxx_priv_state, ppu_work);

	mutex_lock(&ps->smi_mutex);

	mutex_lock(&ps->reg_lock);

	if (mutex_trylock(&ps->ppu_mutex)) {

		if (mv88e6xxx_ppu_enable(ps) == 0)

		mutex_unlock(&ps->ppu_mutex);

	}

	mutex_unlock(&ps->smi_mutex);

	mutex_unlock(&ps->reg_lock);

}

static void mv88e6xxx_ppu_reenable_timer(unsigned long _ps)

	if (!phy_is_pseudo_fixed_link(phydev))

		return;

	mutex_lock(&ps->smi_mutex);

	mutex_lock(&ps->reg_lock);

	ret = _mv88e6xxx_reg_read(ps, REG_PORT(port), PORT_PCS_CTRL);

	if (ret < 0)

	_mv88e6xxx_reg_write(ps, REG_PORT(port), PORT_PCS_CTRL, reg);

out:

	mutex_unlock(&ps->smi_mutex);

	mutex_unlock(&ps->reg_lock);

}

static int _mv88e6xxx_stats_wait(struct mv88e6xxx_priv_state *ps)

	int ret;

	int i, j;

	mutex_lock(&ps->smi_mutex);

	mutex_lock(&ps->reg_lock);

	ret = _mv88e6xxx_stats_snapshot(ps, port);

	if (ret < 0) {

		mutex_unlock(&ps->smi_mutex);

		mutex_unlock(&ps->reg_lock);

		return;

	}

	for (i = 0, j = 0; i < ARRAY_SIZE(mv88e6xxx_hw_stats); i++) {

		}

	}

	mutex_unlock(&ps->smi_mutex);

	mutex_unlock(&ps->reg_lock);

}

static int mv88e6xxx_get_regs_len(struct dsa_switch *ds, int port)

	memset(p, 0xff, 32 * sizeof(u16));

	mutex_lock(&ps->smi_mutex);

	mutex_lock(&ps->reg_lock);

	for (i = 0; i < 32; i++) {

		int ret;

			p[i] = ret;

	}

	mutex_unlock(&ps->smi_mutex);

	mutex_unlock(&ps->reg_lock);

}

static int _mv88e6xxx_wait(struct mv88e6xxx_priv_state *ps, int reg, int offset,

{

	int ret;

	mutex_lock(&ps->smi_mutex);

	mutex_lock(&ps->reg_lock);

	ret = _mv88e6xxx_wait(ps, reg, offset, mask);

	mutex_unlock(&ps->smi_mutex);

	mutex_unlock(&ps->reg_lock);

	return ret;

}

	if (!mv88e6xxx_has(ps, MV88E6XXX_FLAG_EEE))

		return -EOPNOTSUPP;

	mutex_lock(&ps->smi_mutex);

	mutex_lock(&ps->reg_lock);

	reg = mv88e6xxx_mdio_read_indirect(ps, port, 16);

	if (reg < 0)

	reg = 0;

out:

	mutex_unlock(&ps->smi_mutex);

	mutex_unlock(&ps->reg_lock);

	return reg;

}

	if (!mv88e6xxx_has(ps, MV88E6XXX_FLAG_EEE))

		return -EOPNOTSUPP;

	mutex_lock(&ps->smi_mutex);

	mutex_lock(&ps->reg_lock);

	ret = mv88e6xxx_mdio_read_indirect(ps, port, 16);

	if (ret < 0)

	ret = mv88e6xxx_mdio_write_indirect(ps, port, 16, reg);

out:

	mutex_unlock(&ps->smi_mutex);

	mutex_unlock(&ps->reg_lock);

	return ret;

}

		break;

	}

	mutex_lock(&ps->smi_mutex);

	mutex_lock(&ps->reg_lock);

	err = _mv88e6xxx_port_state(ps, port, stp_state);

	mutex_unlock(&ps->smi_mutex);

	mutex_unlock(&ps->reg_lock);

	if (err)

		netdev_err(ds->ports[port].netdev,

	if (!mv88e6xxx_has(ps, MV88E6XXX_FLAG_VTU))

		return -EOPNOTSUPP;

	mutex_lock(&ps->smi_mutex);

	mutex_lock(&ps->reg_lock);

	err = _mv88e6xxx_port_pvid_get(ps, port, &pvid);

	if (err)

	} while (next.vid < GLOBAL_VTU_VID_MASK);

unlock:

	mutex_unlock(&ps->smi_mutex);

	mutex_unlock(&ps->reg_lock);

	return err;

}

	if (!vid_begin)

		return -EOPNOTSUPP;

	mutex_lock(&ps->smi_mutex);

	mutex_lock(&ps->reg_lock);

	err = _mv88e6xxx_vtu_vid_write(ps, vid_begin - 1);

	if (err)

	} while (vlan.vid < vid_end);

unlock:

	mutex_unlock(&ps->smi_mutex);

	mutex_unlock(&ps->reg_lock);

	return err;

}

	if (!mv88e6xxx_has(ps, MV88E6XXX_FLAG_VTU))

		return -EOPNOTSUPP;

	mutex_lock(&ps->smi_mutex);

	mutex_lock(&ps->reg_lock);

	ret = _mv88e6xxx_reg_read(ps, REG_PORT(port), PORT_CONTROL_2);

	if (ret < 0)

	ret = 0;

unlock:

	mutex_unlock(&ps->smi_mutex);

	mutex_unlock(&ps->reg_lock);

	return ret;

}

	if (!mv88e6xxx_has(ps, MV88E6XXX_FLAG_VTU))

		return;

	mutex_lock(&ps->smi_mutex);

	mutex_lock(&ps->reg_lock);

	for (vid = vlan->vid_begin; vid <= vlan->vid_end; ++vid)

		if (_mv88e6xxx_port_vlan_add(ps, port, vid, untagged))

		netdev_err(ds->ports[port].netdev, "failed to set PVID %d\n",

			   vlan->vid_end);

	mutex_unlock(&ps->smi_mutex);

	mutex_unlock(&ps->reg_lock);

}

static int _mv88e6xxx_port_vlan_del(struct mv88e6xxx_priv_state *ps,

	if (!mv88e6xxx_has(ps, MV88E6XXX_FLAG_VTU))

		return -EOPNOTSUPP;

	mutex_lock(&ps->smi_mutex);

	mutex_lock(&ps->reg_lock);

	err = _mv88e6xxx_port_pvid_get(ps, port, &pvid);

	if (err)

	}

unlock:

	mutex_unlock(&ps->smi_mutex);

	mutex_unlock(&ps->reg_lock);

	return err;

}

	if (!mv88e6xxx_has(ps, MV88E6XXX_FLAG_ATU))

		return;

	mutex_lock(&ps->smi_mutex);

	mutex_lock(&ps->reg_lock);

	if (_mv88e6xxx_port_fdb_load(ps, port, fdb->addr, fdb->vid, state))

		netdev_err(ds->ports[port].netdev,

			   "failed to load MAC address\n");

	mutex_unlock(&ps->smi_mutex);

	mutex_unlock(&ps->reg_lock);

}

static int mv88e6xxx_port_fdb_del(struct dsa_switch *ds, int port,

	if (!mv88e6xxx_has(ps, MV88E6XXX_FLAG_ATU))

		return -EOPNOTSUPP;

	mutex_lock(&ps->smi_mutex);

	mutex_lock(&ps->reg_lock);

	ret = _mv88e6xxx_port_fdb_load(ps, port, fdb->addr, fdb->vid,

				       GLOBAL_ATU_DATA_STATE_UNUSED);

	mutex_unlock(&ps->smi_mutex);

	mutex_unlock(&ps->reg_lock);

	return ret;

}

	if (!mv88e6xxx_has(ps, MV88E6XXX_FLAG_ATU))

		return -EOPNOTSUPP;

	mutex_lock(&ps->smi_mutex);

	mutex_lock(&ps->reg_lock);

	/* Dump port's default Filtering Information Database (VLAN ID 0) */

	err = _mv88e6xxx_port_fid_get(ps, port, &fid);

	} while (vlan.vid < GLOBAL_VTU_VID_MASK);

unlock:

	mutex_unlock(&ps->smi_mutex);

	mutex_unlock(&ps->reg_lock);

	return err;

}

	if (!mv88e6xxx_has(ps, MV88E6XXX_FLAG_VLANTABLE))

		return -EOPNOTSUPP;

	mutex_lock(&ps->smi_mutex);

	mutex_lock(&ps->reg_lock);

	/* Assign the bridge and remap each port's VLANTable */

	ps->ports[port].bridge_dev = bridge;

		}

	}

	mutex_unlock(&ps->smi_mutex);

	mutex_unlock(&ps->reg_lock);

	return err;

}

	if (!mv88e6xxx_has(ps, MV88E6XXX_FLAG_VLANTABLE))

		return;

	mutex_lock(&ps->smi_mutex);

	mutex_lock(&ps->reg_lock);

	/* Unassign the bridge and remap each port's VLANTable */

	ps->ports[port].bridge_dev = NULL;

				netdev_warn(ds->ports[i].netdev,

					    "failed to remap\n");

	mutex_unlock(&ps->smi_mutex);

	mutex_unlock(&ps->reg_lock);

}

static int _mv88e6xxx_mdio_page_write(struct mv88e6xxx_priv_state *ps,

	if (mv88e6xxx_has(ps, MV88E6XXX_FLAG_EEPROM))

		mutex_init(&ps->eeprom_mutex);

	mutex_lock(&ps->smi_mutex);

	mutex_lock(&ps->reg_lock);

	err = mv88e6xxx_switch_reset(ps);

	if (err)

	}

unlock:

	mutex_unlock(&ps->smi_mutex);

	mutex_unlock(&ps->reg_lock);

	return err;

}

	struct mv88e6xxx_priv_state *ps = ds_to_priv(ds);

	int ret;

	mutex_lock(&ps->smi_mutex);

	mutex_lock(&ps->reg_lock);

	ret = _mv88e6xxx_mdio_page_read(ps, port, page, reg);

	mutex_unlock(&ps->smi_mutex);

	mutex_unlock(&ps->reg_lock);

	return ret;

}

	struct mv88e6xxx_priv_state *ps = ds_to_priv(ds);

	int ret;

	mutex_lock(&ps->smi_mutex);

	mutex_lock(&ps->reg_lock);

	ret = _mv88e6xxx_mdio_page_write(ps, port, page, reg, val);

	mutex_unlock(&ps->smi_mutex);

	mutex_unlock(&ps->reg_lock);

	return ret;

}

	if (addr < 0)

		return 0xffff;

	mutex_lock(&ps->smi_mutex);

	mutex_lock(&ps->reg_lock);

	if (mv88e6xxx_has(ps, MV88E6XXX_FLAG_PPU))

		ret = mv88e6xxx_mdio_read_ppu(ps, addr, regnum);

	else

		ret = mv88e6xxx_mdio_read_direct(ps, addr, regnum);

	mutex_unlock(&ps->smi_mutex);

	mutex_unlock(&ps->reg_lock);

	return ret;

}

	if (addr < 0)

		return 0xffff;

	mutex_lock(&ps->smi_mutex);

	mutex_lock(&ps->reg_lock);

	if (mv88e6xxx_has(ps, MV88E6XXX_FLAG_PPU))

		ret = mv88e6xxx_mdio_write_ppu(ps, addr, regnum, val);

	else

		ret = mv88e6xxx_mdio_write_direct(ps, addr, regnum, val);

	mutex_unlock(&ps->smi_mutex);

	mutex_unlock(&ps->reg_lock);

	return ret;

}

	*temp = 0;

	mutex_lock(&ps->smi_mutex);

	mutex_lock(&ps->reg_lock);

	ret = mv88e6xxx_mdio_write_direct(ps, 0x0, 0x16, 0x6);

	if (ret < 0)

error:

	mv88e6xxx_mdio_write_direct(ps, 0x0, 0x16, 0x0);

	mutex_unlock(&ps->smi_mutex);

	mutex_unlock(&ps->reg_lock);

	return ret;

}

	ps->sw_addr = sw_addr;

	ps->info = info;

	ps->dev = dsa_dev;

	mutex_init(&ps->smi_mutex);

	mutex_init(&ps->reg_lock);

	err = mv88e6xxx_mdio_register(ps, NULL);

	if (err)

	ps->dev = dev;

	ps->bus = mdiodev->bus;

	ps->sw_addr = mdiodev->addr;

	mutex_init(&ps->smi_mutex);

	mutex_init(&ps->reg_lock);

	id = mv88e6xxx_reg_read(ps, REG_PORT(0), PORT_SWITCH_ID);

	if (id < 0)

	/* The device this structure is associated to */

	struct device *dev;

	/* When using multi-chip addressing, this mutex protects

	 * access to the indirect access registers.  (In single-chip

	 * mode, this mutex is effectively useless.)

	 */

	struct mutex	smi_mutex;

	/* This mutex protects the access to the switch registers */

	struct mutex reg_lock;

	/* The MII bus and the address on the bus that is used to

	 * communication with the switch