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Commit 9f804202 authored by Senthil Balasubramanian's avatar Senthil Balasubramanian Committed by John W. Linville
Browse files

ath9k: INI update for atheros chipets. 



init values update for various atheros chipsets.

Signed-off-by: default avatarSenthil Balasubramanian <senthilkumar@atheros.com>
Signed-off-by: default avatarJohn W. Linville <linville@tuxdriver.com>
parent ea4a82dc

drivers/net/wireless/ath9k/eeprom.c

+5 −0
Original line number Diff line number Diff line
@@ -1584,6 +1584,11 @@ u32 ath9k_hw_get_eeprom(struct ath_hal *ah, 
		return pBase->txMask;

	case EEP_RX_MASK:

		return pBase->rxMask;

	case EEP_RXGAIN_TYPE:

		return pBase->rxGainType;

	case EEP_TXGAIN_TYPE:

		return pBase->txGainType;



	default:

		return 0;

	}

drivers/net/wireless/ath9k/hw.c

+62 −0
Original line number Diff line number Diff line
@@ -557,6 +557,54 @@ static int ath9k_hw_init_macaddr(struct ath_hal *ah) 
	return 0;

}



static void ath9k_hw_init_rxgain_ini(struct ath_hal *ah)

{

	u32 rxgain_type;

	struct ath_hal_5416 *ahp = AH5416(ah);



	if (ath9k_hw_get_eeprom(ah, EEP_MINOR_REV) >= AR5416_EEP_MINOR_VER_17) {

		rxgain_type = ath9k_hw_get_eeprom(ah, EEP_RXGAIN_TYPE);



		if (rxgain_type == AR5416_EEP_RXGAIN_13DB_BACKOFF)

			INIT_INI_ARRAY(&ahp->ah_iniModesRxGain,

			ar9280Modes_backoff_13db_rxgain_9280_2,

			ARRAY_SIZE(ar9280Modes_backoff_13db_rxgain_9280_2), 6);

		else if (rxgain_type == AR5416_EEP_RXGAIN_23DB_BACKOFF)

			INIT_INI_ARRAY(&ahp->ah_iniModesRxGain,

			ar9280Modes_backoff_23db_rxgain_9280_2,

			ARRAY_SIZE(ar9280Modes_backoff_23db_rxgain_9280_2), 6);

		else

			INIT_INI_ARRAY(&ahp->ah_iniModesRxGain,

			ar9280Modes_original_rxgain_9280_2,

			ARRAY_SIZE(ar9280Modes_original_rxgain_9280_2), 6);

	} else

		INIT_INI_ARRAY(&ahp->ah_iniModesRxGain,

			ar9280Modes_original_rxgain_9280_2,

			ARRAY_SIZE(ar9280Modes_original_rxgain_9280_2), 6);

}



static void ath9k_hw_init_txgain_ini(struct ath_hal *ah)

{

	u32 txgain_type;

	struct ath_hal_5416 *ahp = AH5416(ah);



	if (ath9k_hw_get_eeprom(ah, EEP_MINOR_REV) >= AR5416_EEP_MINOR_VER_19) {

		txgain_type = ath9k_hw_get_eeprom(ah, EEP_TXGAIN_TYPE);



		if (txgain_type == AR5416_EEP_TXGAIN_HIGH_POWER)

			INIT_INI_ARRAY(&ahp->ah_iniModesTxGain,

			ar9280Modes_high_power_tx_gain_9280_2,

			ARRAY_SIZE(ar9280Modes_high_power_tx_gain_9280_2), 6);

		else

			INIT_INI_ARRAY(&ahp->ah_iniModesTxGain,

			ar9280Modes_original_tx_gain_9280_2,

			ARRAY_SIZE(ar9280Modes_original_tx_gain_9280_2), 6);

	} else

		INIT_INI_ARRAY(&ahp->ah_iniModesTxGain,

		ar9280Modes_original_tx_gain_9280_2,

		ARRAY_SIZE(ar9280Modes_original_tx_gain_9280_2), 6);

}



static int ath9k_hw_post_attach(struct ath_hal *ah)

{

	int ecode;
@@ -800,6 +848,14 @@ static struct ath_hal *ath9k_hw_do_attach(u16 devid, struct ath_softc *sc, 
	if (ecode != 0)

		goto bad;



	/* rxgain table */

	if (AR_SREV_9280_20_OR_LATER(ah))

		ath9k_hw_init_rxgain_ini(ah);



	/* txgain table */

	if (AR_SREV_9280_20_OR_LATER(ah))

		ath9k_hw_init_txgain_ini(ah);



#ifndef CONFIG_SLOW_ANT_DIV

	if (ah->ah_devid == AR9280_DEVID_PCI) {

		for (i = 0; i < ahp->ah_iniModes.ia_rows; i++) {
@@ -1258,6 +1314,12 @@ static int ath9k_hw_process_ini(struct ath_hal *ah, 
		DO_DELAY(regWrites);

	}



	if (AR_SREV_9280_20_OR_LATER(ah))

		REG_WRITE_ARRAY(&ahp->ah_iniModesRxGain, modesIndex, regWrites);



	if (AR_SREV_9280_20_OR_LATER(ah))

		REG_WRITE_ARRAY(&ahp->ah_iniModesTxGain, modesIndex, regWrites);



	for (i = 0; i < ahp->ah_iniCommon.ia_rows; i++) {

		u32 reg = INI_RA(&ahp->ah_iniCommon, i, 0);

		u32 val = INI_RA(&ahp->ah_iniCommon, i, 1);

drivers/net/wireless/ath9k/hw.h

+22 −1
Original line number Diff line number Diff line
@@ -415,6 +415,9 @@ struct ar5416Stats { 
#define AR5416_EEP_MINOR_VER_3       0x3

#define AR5416_EEP_MINOR_VER_7       0x7

#define AR5416_EEP_MINOR_VER_9       0x9

#define AR5416_EEP_MINOR_VER_16      0x10

#define AR5416_EEP_MINOR_VER_17      0x11

#define AR5416_EEP_MINOR_VER_19      0x13



#define AR5416_NUM_5G_CAL_PIERS         8

#define AR5416_NUM_2G_CAL_PIERS         4
@@ -436,6 +439,16 @@ struct ar5416Stats { 
#define AR5416_MAX_CHAINS               3

#define AR5416_PWR_TABLE_OFFSET         -5



/* Rx gain type values */

#define AR5416_EEP_RXGAIN_23DB_BACKOFF     0

#define AR5416_EEP_RXGAIN_13DB_BACKOFF     1

#define AR5416_EEP_RXGAIN_ORIG             2



/* Tx gain type values */

#define AR5416_EEP_TXGAIN_ORIGINAL         0

#define AR5416_EEP_TXGAIN_HIGH_POWER       1





enum eeprom_param {

	EEP_NFTHRESH_5,

	EEP_NFTHRESH_2,
@@ -454,6 +467,8 @@ enum eeprom_param { 
	EEP_MINOR_REV,

	EEP_TX_MASK,

	EEP_RX_MASK,

	EEP_RXGAIN_TYPE,

	EEP_TXGAIN_TYPE,

};



enum ar5416_rates {
@@ -485,7 +500,11 @@ struct base_eep_header { 
	u32 binBuildNumber;

	u8 deviceType;

	u8 pwdclkind;

	u8 futureBase[32];

	u8 futureBase_1[2];

	u8 rxGainType;

	u8 futureBase_2[3];

	u8 txGainType;

	u8 futureBase_3[25];

} __packed;



struct spur_chan {
@@ -792,6 +811,8 @@ struct ath_hal_5416 { 
	struct ar5416IniArray ah_iniAddac;

	struct ar5416IniArray ah_iniPcieSerdes;

	struct ar5416IniArray ah_iniModesAdditional;

	struct ar5416IniArray ah_iniModesRxGain;

	struct ar5416IniArray ah_iniModesTxGain;

};

#define AH5416(_ah) ((struct ath_hal_5416 *)(_ah))