Commit 9db829d2 authored Jun 22, 2017 by Robin Murphy Committed by Will Deacon Jun 23, 2017

iommu/io-pgtable-arm-v7s: Check table PTEs more precisely

Whilst we don't support the PXN bit at all, so should never encounter a
level 1 section or supersection PTE with it set, it would still be wise
to check both table type bits to resolve any theoretical ambiguity.

Signed-off-by: Robin Murphy <robin.murphy@arm.com>
Signed-off-by: Will Deacon <will.deacon@arm.com>

parent 5c2d0218

drivers/iommu/io-pgtable-arm-v7s.c

+2 −1

Original line number	Diff line number	Diff line
		@@ -92,7 +92,8 @@
		#define ARM_V7S_PTE_TYPE_CONT_PAGE 0x1

		#define ARM_V7S_PTE_IS_VALID(pte) (((pte) & 0x3) != 0)
		#define ARM_V7S_PTE_IS_TABLE(pte, lvl) (lvl == 1 && ((pte) & ARM_V7S_PTE_TYPE_TABLE))
		#define ARM_V7S_PTE_IS_TABLE(pte, lvl) \
		((lvl) == 1 && (((pte) & 0x3) == ARM_V7S_PTE_TYPE_TABLE))

		/* Page table bits */
		#define ARM_V7S_ATTR_XN(lvl) BIT(4 * (2 - (lvl)))