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Commit 9ccc906c authored by Thomas Gleixner's avatar Thomas Gleixner
Browse files

x86: distangle user disabled TSC from unstable 



tsc_enabled is set to 0 from the command line switch "notsc" and from
the mark_tsc_unstable code. Seperate those functionalities and replace
tsc_enable with tsc_disable. This makes also the native_sched_clock()
decision when to use TSC understandable.

Preparatory patch to solve the sched_clock() issue on 32 bit.

Signed-off-by: default avatarThomas Gleixner <tglx@linutronix.de>
parent b6db80ee

arch/x86/kernel/tsc_32.c

+10 −10
Original line number Diff line number Diff line
@@ -14,7 +14,7 @@ 


#include "mach_timer.h"



static int tsc_enabled;

static int tsc_disabled;



/*

 * On some systems the TSC frequency does not
@@ -29,7 +29,7 @@ static int __init tsc_setup(char *str) 
{

	printk(KERN_WARNING "notsc: Kernel compiled with CONFIG_X86_TSC, "

	       "cannot disable TSC completely.\n");

	mark_tsc_unstable("user disabled TSC");

	tsc_disabled = 1;

	return 1;

}

#else
@@ -120,7 +120,7 @@ unsigned long long native_sched_clock(void) 
	 *   very important for it to be as fast as the platform

	 *   can achive it. )

	 */

	if (unlikely(!tsc_enabled && !tsc_unstable))

	if (unlikely(tsc_disabled))

		/* No locking but a rare wrong value is not a big deal: */

		return (jiffies_64 - INITIAL_JIFFIES) * (1000000000 / HZ);
@@ -322,7 +322,6 @@ void mark_tsc_unstable(char *reason) 
{

	if (!tsc_unstable) {

		tsc_unstable = 1;

		tsc_enabled = 0;

		printk("Marking TSC unstable due to: %s.\n", reason);

		/* Can be called before registration */

		if (clocksource_tsc.mult)
@@ -403,8 +402,11 @@ void __init tsc_init(void) 
{

	int cpu;



	if (!cpu_has_tsc)

	if (!cpu_has_tsc || tsc_disabled) {

		/* Disable the TSC in case of !cpu_has_tsc */

		tsc_disabled = 1;

		return;

	}



	cpu_khz = calculate_cpu_khz();

	tsc_khz = cpu_khz;
@@ -441,8 +443,6 @@ void __init tsc_init(void) 
	if (check_tsc_unstable()) {

		clocksource_tsc.rating = 0;

		clocksource_tsc.flags &= ~CLOCK_SOURCE_IS_CONTINUOUS;

	} else

		tsc_enabled = 1;



	}

	clocksource_register(&clocksource_tsc);

}