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Commit 9a091d9e authored by Vineet Gupta's avatar Vineet Gupta
Browse files

ARC: [SMP] ISS SMP extension bitrot 



* Move extension specific code out of common SMP code
* Don't enable it by default for SMP

Signed-off-by: default avatarVineet Gupta <vgupta@synopsys.com>
parent 89ca3b88

arch/arc/include/asm/irq.h

+0 −2
Original line number Diff line number Diff line
@@ -19,8 +19,6 @@ 
#include <asm-generic/irq.h>



extern void arc_init_IRQ(void);

extern int get_hw_config_num_irq(void);



void arc_local_timer_setup(unsigned int cpu);



#endif

arch/arc/kernel/irq.c

+0 −18
Original line number Diff line number Diff line
@@ -150,24 +150,6 @@ void arch_do_IRQ(unsigned int irq, struct pt_regs *regs) 
	set_irq_regs(old_regs);

}



int get_hw_config_num_irq(void)

{

	uint32_t val = read_aux_reg(ARC_REG_VECBASE_BCR);



	switch (val & 0x03) {

	case 0:

		return 16;

	case 1:

		return 32;

	case 2:

		return 8;

	default:

		return 0;

	}



	return 0;

}



/*

 * arch_local_irq_enable - Enable interrupts.

 *

arch/arc/plat-arcfpga/Makefile

+1 −1
Original line number Diff line number Diff line
@@ -9,4 +9,4 @@ 
KBUILD_CFLAGS	+= -Iarch/arc/plat-arcfpga/include



obj-y := platform.o irq.o

obj-$(CONFIG_SMP)		+= smp.o
 
obj-$(CONFIG_ISS_SMP_EXTN)		+= smp.o

arch/arc/plat-arcfpga/platform.c

+2 −2
Original line number Diff line number Diff line
@@ -169,7 +169,7 @@ static void __init plat_fpga_early_init(void) 


	arc_fpga_serial_init();



#ifdef CONFIG_SMP

#ifdef CONFIG_ISS_SMP_EXTN

	iss_model_init_early_smp();

#endif

}
@@ -211,7 +211,7 @@ MACHINE_START(ANGEL4, "angel4") 
	.init_early	= plat_fpga_early_init,

	.init_machine	= plat_fpga_populate_dev,

	.init_irq	= plat_fpga_init_IRQ,

#ifdef CONFIG_SMP

#ifdef CONFIG_ISS_SMP_EXTN

	.init_smp	= iss_model_init_smp,

#endif

MACHINE_END

arch/arc/plat-arcfpga/smp.c

+18 −0
Original line number Diff line number Diff line
@@ -42,6 +42,24 @@ static void iss_model_smp_wakeup_cpu(int cpu, unsigned long pc) 


}



static inline int get_hw_config_num_irq(void)

{

	uint32_t val = read_aux_reg(ARC_REG_VECBASE_BCR);



	switch (val & 0x03) {

	case 0:

		return 16;

	case 1:

		return 32;

	case 2:

		return 8;

	default:

		return 0;

	}



	return 0;

}



/*

 * Any SMP specific init any CPU does when it comes up.

 * Here we setup the CPU to enable Inter-Processor-Interrupts