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Commit 99f861bc authored by Lucas Stach's avatar Lucas Stach
Browse files

drm/etnaviv: move linear window setup into etnaviv_iommuv1_restore 



It is only relevant for the V1 MMU, so we should not do this in the
common code.

Signed-off-by: default avatarLucas Stach <l.stach@pengutronix.de>
parent 99aeeb7c

drivers/gpu/drm/etnaviv/etnaviv_gpu.c

+1 −8
Original line number Diff line number Diff line
@@ -568,14 +568,7 @@ static void etnaviv_gpu_hw_init(struct etnaviv_gpu *gpu) 
		gpu_write(gpu, VIVS_MC_BUS_CONFIG, bus_config);

	}



	/* set base addresses */

	gpu_write(gpu, VIVS_MC_MEMORY_BASE_ADDR_RA, gpu->memory_base);

	gpu_write(gpu, VIVS_MC_MEMORY_BASE_ADDR_FE, gpu->memory_base);

	gpu_write(gpu, VIVS_MC_MEMORY_BASE_ADDR_TX, gpu->memory_base);

	gpu_write(gpu, VIVS_MC_MEMORY_BASE_ADDR_PEZ, gpu->memory_base);

	gpu_write(gpu, VIVS_MC_MEMORY_BASE_ADDR_PE, gpu->memory_base);



	/* setup the MMU page table pointers */

	/* setup the MMU */

	etnaviv_iommuv1_restore(gpu);



	/* Start command processor */

drivers/gpu/drm/etnaviv/etnaviv_iommu.c

+7 −0
Original line number Diff line number Diff line
@@ -202,6 +202,13 @@ void etnaviv_iommuv1_restore(struct etnaviv_gpu *gpu) 
			to_etnaviv_domain(gpu->mmu->domain);

	u32 pgtable;



	/* set base addresses */

	gpu_write(gpu, VIVS_MC_MEMORY_BASE_ADDR_RA, gpu->memory_base);

	gpu_write(gpu, VIVS_MC_MEMORY_BASE_ADDR_FE, gpu->memory_base);

	gpu_write(gpu, VIVS_MC_MEMORY_BASE_ADDR_TX, gpu->memory_base);

	gpu_write(gpu, VIVS_MC_MEMORY_BASE_ADDR_PEZ, gpu->memory_base);

	gpu_write(gpu, VIVS_MC_MEMORY_BASE_ADDR_PE, gpu->memory_base);



	/* set page table address in MC */

	pgtable = (u32)etnaviv_domain->pgtable.paddr;