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Commit 9962b3d4 authored by Shawn Guo's avatar Shawn Guo Committed by Olof Johansson
Browse files

ARM: dts: imx6q: clean up unused ipu2grp 



The pinctrl group ipu2grp is a leftover from the previous iomuxc DT
cleanup.  It's not used by anyone now.  More importantly, it's getting
in the way of saving the unnecessary pinfunc container node from the
board dts files that include imx6q.dtsi.

Let's clean it up.

Signed-off-by: default avatarShawn Guo <shawnguo@kernel.org>
Tested-by: default avatarMichael Trimarchi <michael@amarulasolutions.com>
Signed-off-by: default avatarOlof Johansson <olof@lixom.net>
parent d731afa4

arch/arm/boot/dts/imx6q.dtsi

+0 −36
Original line number Diff line number Diff line
@@ -104,42 +104,6 @@ 


			iomuxc: iomuxc@020e0000 {

				compatible = "fsl,imx6q-iomuxc";



				ipu2 {

					pinctrl_ipu2_1: ipu2grp-1 {

						fsl,pins = <

							MX6QDL_PAD_DI0_DISP_CLK__IPU2_DI0_DISP_CLK 0x10

							MX6QDL_PAD_DI0_PIN15__IPU2_DI0_PIN15       0x10

							MX6QDL_PAD_DI0_PIN2__IPU2_DI0_PIN02        0x10

							MX6QDL_PAD_DI0_PIN3__IPU2_DI0_PIN03        0x10

							MX6QDL_PAD_DI0_PIN4__IPU2_DI0_PIN04        0x80000000

							MX6QDL_PAD_DISP0_DAT0__IPU2_DISP0_DATA00   0x10

							MX6QDL_PAD_DISP0_DAT1__IPU2_DISP0_DATA01   0x10

							MX6QDL_PAD_DISP0_DAT2__IPU2_DISP0_DATA02   0x10

							MX6QDL_PAD_DISP0_DAT3__IPU2_DISP0_DATA03   0x10

							MX6QDL_PAD_DISP0_DAT4__IPU2_DISP0_DATA04   0x10

							MX6QDL_PAD_DISP0_DAT5__IPU2_DISP0_DATA05   0x10

							MX6QDL_PAD_DISP0_DAT6__IPU2_DISP0_DATA06   0x10

							MX6QDL_PAD_DISP0_DAT7__IPU2_DISP0_DATA07   0x10

							MX6QDL_PAD_DISP0_DAT8__IPU2_DISP0_DATA08   0x10

							MX6QDL_PAD_DISP0_DAT9__IPU2_DISP0_DATA09   0x10

							MX6QDL_PAD_DISP0_DAT10__IPU2_DISP0_DATA10  0x10

							MX6QDL_PAD_DISP0_DAT11__IPU2_DISP0_DATA11  0x10

							MX6QDL_PAD_DISP0_DAT12__IPU2_DISP0_DATA12  0x10

							MX6QDL_PAD_DISP0_DAT13__IPU2_DISP0_DATA13  0x10

							MX6QDL_PAD_DISP0_DAT14__IPU2_DISP0_DATA14  0x10

							MX6QDL_PAD_DISP0_DAT15__IPU2_DISP0_DATA15  0x10

							MX6QDL_PAD_DISP0_DAT16__IPU2_DISP0_DATA16  0x10

							MX6QDL_PAD_DISP0_DAT17__IPU2_DISP0_DATA17  0x10

							MX6QDL_PAD_DISP0_DAT18__IPU2_DISP0_DATA18  0x10

							MX6QDL_PAD_DISP0_DAT19__IPU2_DISP0_DATA19  0x10

							MX6QDL_PAD_DISP0_DAT20__IPU2_DISP0_DATA20  0x10

							MX6QDL_PAD_DISP0_DAT21__IPU2_DISP0_DATA21  0x10

							MX6QDL_PAD_DISP0_DAT22__IPU2_DISP0_DATA22  0x10

							MX6QDL_PAD_DISP0_DAT23__IPU2_DISP0_DATA23  0x10

						>;

					};

				};

			};

		};