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Commit 97e18dc0 authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge tag 'mmc-updates-for-3.15-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/cjb/mmc 

Pull MMC updates from Chris Ball:
 "MMC highlights for 3.15:

  Core:
   - CONFIG_MMC_UNSAFE_RESUME=y is now default behavior
   - DT bindings for SDHCI UHS, eMMC HS200, high-speed DDR, at 1.8/1.2V
   - Add GPIO descriptor based slot-gpio card detect API

  Drivers:
   - dw_mmc: Refactor SOCFPGA support as a variant inside dw_mmc-pltfm.c
   - mmci: Support HW busy detection on ux500
   - omap: Support MMC_ERASE
   - omap_hsmmc: Support MMC_PM_KEEP_POWER, MMC_PM_WAKE_SDIO_IRQ, (a)cmd23
   - rtsx: Support pre-req/post-req async
   - sdhci: Add support for Realtek RTS5250 controllers
   - sdhci-acpi: Add support for 80860F16, fix 80860F14/SDIO card detect
   - sdhci-msm: Add new driver for Qualcomm SDHCI chipset support
   - sdhci-pxav3: Add support for Marvell Armada 380 and 385 SoCs"

* tag 'mmc-updates-for-3.15-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/cjb/mmc: (102 commits)
  mmc: sdhci-acpi: Intel SDIO has broken card detect
  mmc: sdhci-pxav3: add support for the Armada 38x SDHCI controller
  mmc: sdhci-msm: Add platform_execute_tuning implementation
  mmc: sdhci-msm: Initial support for Qualcomm chipsets
  mmc: sdhci-msm: Qualcomm SDHCI binding documentation
  sdhci: only reprogram retuning timer when flag is set
  mmc: rename ARCH_BCM to ARCH_BCM_MOBILE
  mmc: sdhci: Allow for irq being shared
  mmc: sdhci-acpi: Add device id 80860F16
  mmc: sdhci-acpi: Fix broken card detect for ACPI HID 80860F14
  mmc: slot-gpio: Add GPIO descriptor based CD GPIO API
  mmc: slot-gpio: Split out CD IRQ request into a separate function
  mmc: slot-gpio: Record GPIO descriptors instead of GPIO numbers
  Revert "dts: socfpga: Add support for SD/MMC on the SOCFPGA platform"
  mmc: sdhci-spear: use generic card detection gpio support
  mmc: sdhci-spear: remove support for power gpio
  mmc: sdhci-spear: simplify resource handling
  mmc: sdhci-spear: fix platform_data usage
  mmc: sdhci-spear: fix error handling paths for DT
  mmc: sdhci-bcm-kona: fix build errors when built-in
  ...
parents 042f7b7c c6748017

Documentation/devicetree/bindings/mmc/mmc.txt

+9 −0
Original line number Diff line number Diff line
@@ -26,9 +26,18 @@ Optional properties: 
  this system, even if the controller claims it is.

- cap-sd-highspeed: SD high-speed timing is supported

- cap-mmc-highspeed: MMC high-speed timing is supported

- sd-uhs-sdr12: SD UHS SDR12 speed is supported

- sd-uhs-sdr25: SD UHS SDR25 speed is supported

- sd-uhs-sdr50: SD UHS SDR50 speed is supported

- sd-uhs-sdr104: SD UHS SDR104 speed is supported

- sd-uhs-ddr50: SD UHS DDR50 speed is supported

- cap-power-off-card: powering off the card is safe

- cap-sdio-irq: enable SDIO IRQ signalling on this interface

- full-pwr-cycle: full power cycle of the card is supported

- mmc-highspeed-ddr-1_8v: eMMC high-speed DDR mode(1.8V I/O) is supported

- mmc-highspeed-ddr-1_2v: eMMC high-speed DDR mode(1.2V I/O) is supported

- mmc-hs200-1_8v: eMMC HS200 mode(1.8V I/O) is supported

- mmc-hs200-1_2v: eMMC HS200 mode(1.2V I/O) is supported



*NOTE* on CD and WP polarity. To use common for all SD/MMC host controllers line

polarity properties, we have to fix the meaning of the "normal" and "inverted"

Documentation/devicetree/bindings/mmc/sdhci-msm.txt

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+55 −0
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* Qualcomm SDHCI controller (sdhci-msm)



This file documents differences between the core properties in mmc.txt

and the properties used by the sdhci-msm driver.



Required properties:

- compatible: Should contain "qcom,sdhci-msm-v4".

- reg: Base address and length of the register in the following order:

	- Host controller register map (required)

	- SD Core register map (required)

- interrupts: Should contain an interrupt-specifiers for the interrupts:

	- Host controller interrupt (required)

- pinctrl-names: Should contain only one value - "default".

- pinctrl-0: Should specify pin control groups used for this controller.

- clocks: A list of phandle + clock-specifier pairs for the clocks listed in clock-names.

- clock-names: Should contain the following:

	"iface" - Main peripheral bus clock (PCLK/HCLK - AHB Bus clock) (required)

	"core"	- SDC MMC clock (MCLK) (required)

	"bus"	- SDCC bus voter clock (optional)



Example:



	sdhc_1: sdhci@f9824900 {

		compatible = "qcom,sdhci-msm-v4";

		reg = <0xf9824900 0x11c>, <0xf9824000 0x800>;

		interrupts = <0 123 0>;

		bus-width = <8>;

		non-removable;



		vmmc = <&pm8941_l20>;

		vqmmc = <&pm8941_s3>;



		pinctrl-names = "default";

		pinctrl-0 = <&sdc1_clk &sdc1_cmd &sdc1_data>;



		clocks = <&gcc GCC_SDCC1_APPS_CLK>, <&gcc GCC_SDCC1_AHB_CLK>;

		clock-names = "core", "iface";

	};



	sdhc_2: sdhci@f98a4900 {

		compatible = "qcom,sdhci-msm-v4";

		reg = <0xf98a4900 0x11c>, <0xf98a4000 0x800>;

		interrupts = <0 125 0>;

		bus-width = <4>;

		cd-gpios = <&msmgpio 62 0x1>;



		vmmc = <&pm8941_l21>;

		vqmmc = <&pm8941_l13>;



		pinctrl-names = "default";

		pinctrl-0 = <&sdc2_clk &sdc2_cmd &sdc2_data>;



		clocks = <&gcc GCC_SDCC2_APPS_CLK>, <&gcc GCC_SDCC2_AHB_CLK>;

		clock-names = "core", "iface";

	};

Documentation/devicetree/bindings/mmc/sdhci-pxa.txt

+16 −1
Original line number Diff line number Diff line
@@ -4,7 +4,14 @@ This file documents differences between the core properties in mmc.txt 
and the properties used by the sdhci-pxav2 and sdhci-pxav3 drivers.



Required properties:

- compatible: Should be "mrvl,pxav2-mmc" or "mrvl,pxav3-mmc".

- compatible: Should be "mrvl,pxav2-mmc", "mrvl,pxav3-mmc" or

  "marvell,armada-380-sdhci".

- reg:

  * for "mrvl,pxav2-mmc" and "mrvl,pxav3-mmc", one register area for

    the SDHCI registers.

  * for "marvell,armada-380-sdhci", two register areas. The first one

    for the SDHCI registers themselves, and the second one for the

    AXI/Mbus bridge registers of the SDHCI unit.



Optional properties:

- mrvl,clk-delay-cycles: Specify a number of cycles to delay for tuning.
@@ -19,3 +26,11 @@ sdhci@d4280800 { 
	non-removable;

	mrvl,clk-delay-cycles = <31>;

};



sdhci@d8000 {

	compatible = "marvell,armada-380-sdhci";

	reg = <0xd8000 0x1000>, <0xdc000 0x100>;

	interrupts = <0 25 0x4>;

	clocks = <&gateclk 17>;

	mrvl,clk-delay-cycles = <0x1F>;

};

Documentation/devicetree/bindings/mmc/ti-omap-hsmmc.txt

+1 −0
Original line number Diff line number Diff line
@@ -10,6 +10,7 @@ Required properties: 
- compatible:

 Should be "ti,omap2-hsmmc", for OMAP2 controllers

 Should be "ti,omap3-hsmmc", for OMAP3 controllers

 Should be "ti,omap3-pre-es3-hsmmc" for OMAP3 controllers pre ES3.0

 Should be "ti,omap4-hsmmc", for OMAP4 controllers

- ti,hwmods: Must be "mmc<n>", n is controller instance starting 1

Documentation/devicetree/bindings/regulator/pbias-regulator.txt

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+27 −0
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PBIAS internal regulator for SD card dual voltage i/o pads on OMAP SoCs.



Required properties:

- compatible:

  - "ti,pbias-omap" for OMAP2, OMAP3, OMAP4, OMAP5, DRA7.

- reg: pbias register offset from syscon base and size of pbias register.

- syscon : phandle of the system control module

- regulator-name : should be

			pbias_mmc_omap2430 for OMAP2430, OMAP3 SoCs

			pbias_sim_omap3 for OMAP3 SoCs

			pbias_mmc_omap4 for OMAP4 SoCs

			pbias_mmc_omap5 for OMAP5 and DRA7 SoC



Optional properties:

- Any optional property defined in bindings/regulator/regulator.txt



Example:



		pbias_regulator: pbias_regulator {

			compatible = "ti,pbias-omap";

			reg = <0 0x4>;

			syscon = <&omap5_padconf_global>;

			pbias_mmc_reg: pbias_mmc_omap5 {

				regulator-name = "pbias_mmc_omap5";

				regulator-min-microvolt = <1800000>;

				regulator-max-microvolt = <3000000>;

			};