Merge branch 'master' of master.kernel.org:/pub/scm/linux/kernel/git/jkirsher/net-next-2.6 (97c7b179) · Commits · e / devices / android_kernel_teracube_emerald

drivers/net/e1000/e1000_main.c

+7 −4

Original line number	Diff line number	Diff line
		@@ -2402,13 +2402,16 @@ bool e1000_has_link(struct e1000_adapter *adapter)
		struct e1000_hw *hw = &adapter->hw;
		bool link_active = false;

		/* get_link_status is set on LSC (link status) interrupt or
		* rx sequence error interrupt. get_link_status will stay
		* false until the e1000_check_for_link establishes link
		* for copper adapters ONLY
		/* get_link_status is set on LSC (link status) interrupt or rx
		* sequence error interrupt (except on intel ce4100).
		* get_link_status will stay false until the
		* e1000_check_for_link establishes link for copper adapters
		* ONLY
		*/
		switch (hw->media_type) {
		case e1000_media_type_copper:
		if (hw->mac_type == e1000_ce4100)
		hw->get_link_status = 1;
		if (hw->get_link_status) {
		e1000_check_for_link(hw);
		link_active = !hw->get_link_status;

drivers/net/igb/e1000_defines.h

+10 −0

Original line number	Diff line number	Diff line
		@@ -512,6 +512,16 @@
		#define E1000_GCR_CMPL_TMOUT_RESEND 0x00010000
		#define E1000_GCR_CAP_VER2 0x00040000

		/* mPHY Address Control and Data Registers */
		#define E1000_MPHY_ADDR_CTL 0x0024 /* mPHY Address Control Register */
		#define E1000_MPHY_ADDR_CTL_OFFSET_MASK 0xFFFF0000
		#define E1000_MPHY_DATA 0x0E10 /* mPHY Data Register */

		/* mPHY PCS CLK Register */
		#define E1000_MPHY_PCS_CLK_REG_OFFSET 0x0004 /* mPHY PCS CLK AFE CSR Offset */
		/* mPHY Near End Digital Loopback Override Bit */
		#define E1000_MPHY_PCS_CLK_REG_DIGINELBEN 0x10

		/* PHY Control Register */
		#define MII_CR_FULL_DUPLEX 0x0100 /* FDX =1, half duplex =0 */
		#define MII_CR_RESTART_AUTO_NEG 0x0200 /* Restart auto negotiation */

drivers/net/igb/igb_ethtool.c

+33 −0

Original line number	Diff line number	Diff line
		@@ -1461,6 +1461,22 @@ static int igb_setup_loopback_test(struct igb_adapter *adapter)

		/* use CTRL_EXT to identify link type as SGMII can appear as copper */
		if (reg & E1000_CTRL_EXT_LINK_MODE_MASK) {
		if ((hw->device_id == E1000_DEV_ID_DH89XXCC_SGMII) \|\|
		(hw->device_id == E1000_DEV_ID_DH89XXCC_SERDES) \|\|
		(hw->device_id == E1000_DEV_ID_DH89XXCC_BACKPLANE) \|\|
		(hw->device_id == E1000_DEV_ID_DH89XXCC_SFP)) {

		/* Enable DH89xxCC MPHY for near end loopback */
		reg = rd32(E1000_MPHY_ADDR_CTL);
		reg = (reg & E1000_MPHY_ADDR_CTL_OFFSET_MASK) \|
		E1000_MPHY_PCS_CLK_REG_OFFSET;
		wr32(E1000_MPHY_ADDR_CTL, reg);

		reg = rd32(E1000_MPHY_DATA);
		reg \|= E1000_MPHY_PCS_CLK_REG_DIGINELBEN;
		wr32(E1000_MPHY_DATA, reg);
		}

		reg = rd32(E1000_RCTL);
		reg \|= E1000_RCTL_LBM_TCVR;
		wr32(E1000_RCTL, reg);
		@@ -1502,6 +1518,23 @@ static void igb_loopback_cleanup(struct igb_adapter *adapter)
		u32 rctl;
		u16 phy_reg;

		if ((hw->device_id == E1000_DEV_ID_DH89XXCC_SGMII) \|\|
		(hw->device_id == E1000_DEV_ID_DH89XXCC_SERDES) \|\|
		(hw->device_id == E1000_DEV_ID_DH89XXCC_BACKPLANE) \|\|
		(hw->device_id == E1000_DEV_ID_DH89XXCC_SFP)) {
		u32 reg;

		/* Disable near end loopback on DH89xxCC */
		reg = rd32(E1000_MPHY_ADDR_CTL);
		reg = (reg & E1000_MPHY_ADDR_CTL_OFFSET_MASK) \|
		E1000_MPHY_PCS_CLK_REG_OFFSET;
		wr32(E1000_MPHY_ADDR_CTL, reg);

		reg = rd32(E1000_MPHY_DATA);
		reg &= ~E1000_MPHY_PCS_CLK_REG_DIGINELBEN;
		wr32(E1000_MPHY_DATA, reg);
		}

		rctl = rd32(E1000_RCTL);
		rctl &= ~(E1000_RCTL_LBM_TCVR \| E1000_RCTL_LBM_MAC);
		wr32(E1000_RCTL, rctl);

drivers/net/ixgbe/ixgbe.h

+27 −23

Original line number	Diff line number	Diff line
		@@ -214,12 +214,10 @@ struct ixgbe_ring {
		struct ixgbe_rx_buffer *rx_buffer_info;
		};
		unsigned long state;
		u8 atr_sample_rate;
		u8 atr_count;
		u8 __iomem *tail;

		u16 count; /* amount of descriptors */
		u16 rx_buf_len;
		u16 next_to_use;
		u16 next_to_clean;

		u8 queue_index; /* needed for multiqueue queue management */
		u8 reg_idx; /* holds the special value that gets
		@@ -227,15 +225,13 @@ struct ixgbe_ring {
		* associated with this ring, which is
		* different for DCB and RSS modes
		*/
		u8 dcb_tc;

		u16 work_limit; /* max work per interrupt */

		u8 __iomem *tail;
		u8 atr_sample_rate;
		u8 atr_count;

		unsigned int total_bytes;
		unsigned int total_packets;
		u16 next_to_use;
		u16 next_to_clean;

		u8 dcb_tc;
		struct ixgbe_queue_stats stats;
		struct u64_stats_sync syncp;
		union {
		@@ -277,6 +273,18 @@ struct ixgbe_ring_feature {
		int mask;
		} ____cacheline_internodealigned_in_smp;

		struct ixgbe_ring_container {
		#if MAX_RX_QUEUES > MAX_TX_QUEUES
		DECLARE_BITMAP(idx, MAX_RX_QUEUES);
		#else
		DECLARE_BITMAP(idx, MAX_TX_QUEUES);
		#endif
		unsigned int total_bytes; /* total bytes processed this int */
		unsigned int total_packets; /* total packets processed this int */
		u16 work_limit; /* total work allowed per interrupt */
		u8 count; /* total number of rings in vector */
		u8 itr; /* current ITR setting for ring */
		};

		#define MAX_RX_PACKET_BUFFERS ((adapter->flags & IXGBE_FLAG_DCB_ENABLED) \
		? 8 : 1)
		@@ -294,12 +302,7 @@ struct ixgbe_q_vector {
		int cpu; /* CPU for DCA */
		#endif
		struct napi_struct napi;
		DECLARE_BITMAP(rxr_idx, MAX_RX_QUEUES); /* Rx ring indices */
		DECLARE_BITMAP(txr_idx, MAX_TX_QUEUES); /* Tx ring indices */
		u8 rxr_count; /* Rx ring count assigned to this vector */
		u8 txr_count; /* Tx ring count assigned to this vector */
		u8 tx_itr;
		u8 rx_itr;
		struct ixgbe_ring_container rx, tx;
		u32 eitr;
		cpumask_var_t affinity_mask;
		char name[IFNAMSIZ + 9];
		@@ -413,6 +416,9 @@ struct ixgbe_adapter {
		u16 eitr_low;
		u16 eitr_high;

		/* Work limits */
		u16 tx_work_limit;

		/* TX */
		struct ixgbe_ring *tx_ring[MAX_TX_QUEUES] ____cacheline_aligned_in_smp;
		int num_tx_queues;
		@@ -581,13 +587,10 @@ extern s32 ixgbe_fdir_erase_perfect_filter_82599(struct ixgbe_hw *hw,
		u16 soft_id);
		extern void ixgbe_atr_compute_perfect_hash_82599(union ixgbe_atr_input *input,
		union ixgbe_atr_input *mask);
		extern void ixgbe_configure_rscctl(struct ixgbe_adapter *adapter,
		struct ixgbe_ring *ring);
		extern void ixgbe_clear_rscctl(struct ixgbe_adapter *adapter,
		struct ixgbe_ring *ring);
		extern void ixgbe_set_rx_mode(struct net_device *netdev);
		extern int ixgbe_setup_tc(struct net_device *dev, u8 tc);
		extern void ixgbe_tx_ctxtdesc(struct ixgbe_ring *, u32, u32, u32, u32);
		extern void ixgbe_do_reset(struct net_device *netdev);
		#ifdef IXGBE_FCOE
		extern void ixgbe_configure_fcoe(struct ixgbe_adapter *adapter);
		extern int ixgbe_fso(struct ixgbe_ring tx_ring, struct sk_buff skb,
		@@ -595,7 +598,8 @@ extern int ixgbe_fso(struct ixgbe_ring tx_ring, struct sk_buff skb,
		extern void ixgbe_cleanup_fcoe(struct ixgbe_adapter *adapter);
		extern int ixgbe_fcoe_ddp(struct ixgbe_adapter *adapter,
		union ixgbe_adv_rx_desc *rx_desc,
		struct sk_buff *skb);
		struct sk_buff *skb,
		u32 staterr);
		extern int ixgbe_fcoe_ddp_get(struct net_device *netdev, u16 xid,
		struct scatterlist *sgl, unsigned int sgc);
		extern int ixgbe_fcoe_ddp_target(struct net_device *netdev, u16 xid,

drivers/net/ixgbe/ixgbe_ethtool.c

+7 −193

Original line number	Diff line number	Diff line
		@@ -442,109 +442,6 @@ static int ixgbe_set_pauseparam(struct net_device *netdev,
		return 0;
		}

		static void ixgbe_do_reset(struct net_device *netdev)
		{
		struct ixgbe_adapter *adapter = netdev_priv(netdev);

		if (netif_running(netdev))
		ixgbe_reinit_locked(adapter);
		else
		ixgbe_reset(adapter);
		}

		static u32 ixgbe_get_rx_csum(struct net_device *netdev)
		{
		struct ixgbe_adapter *adapter = netdev_priv(netdev);
		return adapter->flags & IXGBE_FLAG_RX_CSUM_ENABLED;
		}

		static void ixgbe_set_rsc(struct ixgbe_adapter *adapter)
		{
		int i;

		for (i = 0; i < adapter->num_rx_queues; i++) {
		struct ixgbe_ring *ring = adapter->rx_ring[i];
		if (adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED) {
		set_ring_rsc_enabled(ring);
		ixgbe_configure_rscctl(adapter, ring);
		} else {
		ixgbe_clear_rscctl(adapter, ring);
		}
		}
		}

		static int ixgbe_set_rx_csum(struct net_device *netdev, u32 data)
		{
		struct ixgbe_adapter *adapter = netdev_priv(netdev);
		bool need_reset = false;

		if (data) {
		adapter->flags \|= IXGBE_FLAG_RX_CSUM_ENABLED;
		} else {
		adapter->flags &= ~IXGBE_FLAG_RX_CSUM_ENABLED;

		if (adapter->flags2 & IXGBE_FLAG2_RSC_CAPABLE) {
		adapter->flags2 &= ~IXGBE_FLAG2_RSC_ENABLED;
		netdev->features &= ~NETIF_F_LRO;
		}

		switch (adapter->hw.mac.type) {
		case ixgbe_mac_X540:
		ixgbe_set_rsc(adapter);
		break;
		case ixgbe_mac_82599EB:
		need_reset = true;
		break;
		default:
		break;
		}
		}

		if (need_reset)
		ixgbe_do_reset(netdev);

		return 0;
		}

		static u32 ixgbe_get_tx_csum(struct net_device *netdev)
		{
		return (netdev->features & NETIF_F_IP_CSUM) != 0;
		}

		static int ixgbe_set_tx_csum(struct net_device *netdev, u32 data)
		{
		struct ixgbe_adapter *adapter = netdev_priv(netdev);
		u32 feature_list;

		feature_list = (NETIF_F_IP_CSUM \| NETIF_F_IPV6_CSUM);
		switch (adapter->hw.mac.type) {
		case ixgbe_mac_82599EB:
		case ixgbe_mac_X540:
		feature_list \|= NETIF_F_SCTP_CSUM;
		break;
		default:
		break;
		}
		if (data)
		netdev->features \|= feature_list;
		else
		netdev->features &= ~feature_list;

		return 0;
		}

		static int ixgbe_set_tso(struct net_device *netdev, u32 data)
		{
		if (data) {
		netdev->features \|= NETIF_F_TSO;
		netdev->features \|= NETIF_F_TSO6;
		} else {
		netdev->features &= ~NETIF_F_TSO;
		netdev->features &= ~NETIF_F_TSO6;
		}
		return 0;
		}

		static u32 ixgbe_get_msglevel(struct net_device *netdev)
		{
		struct ixgbe_adapter *adapter = netdev_priv(netdev);
		@@ -2103,7 +2000,7 @@ static int ixgbe_get_coalesce(struct net_device *netdev,
		{
		struct ixgbe_adapter *adapter = netdev_priv(netdev);

		ec->tx_max_coalesced_frames_irq = adapter->tx_ring[0]->work_limit;
		ec->tx_max_coalesced_frames_irq = adapter->tx_work_limit;

		/* only valid if in constant ITR mode */
		switch (adapter->rx_itr_setting) {
		@@ -2122,7 +2019,7 @@ static int ixgbe_get_coalesce(struct net_device *netdev,
		}

		/* if in mixed tx/rx queues per vector mode, report only rx settings */
		if (adapter->q_vector[0]->txr_count && adapter->q_vector[0]->rxr_count)
		if (adapter->q_vector[0]->tx.count && adapter->q_vector[0]->rx.count)
		return 0;

		/* only valid if in constant ITR mode */
		@@ -2187,12 +2084,12 @@ static int ixgbe_set_coalesce(struct net_device *netdev,
		bool need_reset = false;

		/* don't accept tx specific changes if we've got mixed RxTx vectors */
		if (adapter->q_vector[0]->txr_count && adapter->q_vector[0]->rxr_count
		if (adapter->q_vector[0]->tx.count && adapter->q_vector[0]->rx.count
		&& ec->tx_coalesce_usecs)
		return -EINVAL;

		if (ec->tx_max_coalesced_frames_irq)
		adapter->tx_ring[0]->work_limit = ec->tx_max_coalesced_frames_irq;
		adapter->tx_work_limit = ec->tx_max_coalesced_frames_irq;

		if (ec->rx_coalesce_usecs > 1) {
		/* check the limits */
		@@ -2261,18 +2158,20 @@ static int ixgbe_set_coalesce(struct net_device *netdev,
		int num_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
		for (i = 0; i < num_vectors; i++) {
		q_vector = adapter->q_vector[i];
		if (q_vector->txr_count && !q_vector->rxr_count)
		if (q_vector->tx.count && !q_vector->rx.count)
		/* tx only */
		q_vector->eitr = adapter->tx_eitr_param;
		else
		/* rx only or mixed */
		q_vector->eitr = adapter->rx_eitr_param;
		q_vector->tx.work_limit = adapter->tx_work_limit;
		ixgbe_write_eitr(q_vector);
		}
		/* Legacy Interrupt Mode */
		} else {
		q_vector = adapter->q_vector[0];
		q_vector->eitr = adapter->rx_eitr_param;
		q_vector->tx.work_limit = adapter->tx_work_limit;
		ixgbe_write_eitr(q_vector);
		}

		@@ -2287,81 +2186,6 @@ static int ixgbe_set_coalesce(struct net_device *netdev,
		return 0;
		}

		static int ixgbe_set_flags(struct net_device *netdev, u32 data)
		{
		struct ixgbe_adapter *adapter = netdev_priv(netdev);
		bool need_reset = false;
		int rc;

		#ifdef CONFIG_IXGBE_DCB
		if ((adapter->flags & IXGBE_FLAG_DCB_ENABLED) &&
		!(data & ETH_FLAG_RXVLAN))
		return -EINVAL;
		#endif

		need_reset = (data & ETH_FLAG_RXVLAN) !=
		(netdev->features & NETIF_F_HW_VLAN_RX);

		if ((data & ETH_FLAG_RXHASH) &&
		!(adapter->flags & IXGBE_FLAG_RSS_ENABLED))
		return -EOPNOTSUPP;

		rc = ethtool_op_set_flags(netdev, data, ETH_FLAG_LRO \| ETH_FLAG_NTUPLE \|
		ETH_FLAG_RXVLAN \| ETH_FLAG_TXVLAN \|
		ETH_FLAG_RXHASH);
		if (rc)
		return rc;

		/* if state changes we need to update adapter->flags and reset */
		if ((adapter->flags2 & IXGBE_FLAG2_RSC_CAPABLE) &&
		(!!(data & ETH_FLAG_LRO) !=
		!!(adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED))) {
		if ((data & ETH_FLAG_LRO) &&
		(!adapter->rx_itr_setting \|\|
		(adapter->rx_itr_setting > IXGBE_MAX_RSC_INT_RATE))) {
		e_info(probe, "rx-usecs set too low, "
		"not enabling RSC.\n");
		} else {
		adapter->flags2 ^= IXGBE_FLAG2_RSC_ENABLED;
		switch (adapter->hw.mac.type) {
		case ixgbe_mac_X540:
		ixgbe_set_rsc(adapter);
		break;
		case ixgbe_mac_82599EB:
		need_reset = true;
		break;
		default:
		break;
		}
		}
		}

		/*
		* Check if Flow Director n-tuple support was enabled or disabled. If
		* the state changed, we need to reset.
		*/
		if (!(adapter->flags & IXGBE_FLAG_FDIR_PERFECT_CAPABLE)) {
		/* turn off ATR, enable perfect filters and reset */
		if (data & ETH_FLAG_NTUPLE) {
		adapter->flags &= ~IXGBE_FLAG_FDIR_HASH_CAPABLE;
		adapter->flags \|= IXGBE_FLAG_FDIR_PERFECT_CAPABLE;
		need_reset = true;
		}
		} else if (!(data & ETH_FLAG_NTUPLE)) {
		/* turn off Flow Director, set ATR and reset */
		adapter->flags &= ~IXGBE_FLAG_FDIR_PERFECT_CAPABLE;
		if ((adapter->flags & IXGBE_FLAG_RSS_ENABLED) &&
		!(adapter->flags & IXGBE_FLAG_DCB_ENABLED))
		adapter->flags \|= IXGBE_FLAG_FDIR_HASH_CAPABLE;
		need_reset = true;
		}

		if (need_reset)
		ixgbe_do_reset(netdev);

		return 0;
		}

		static int ixgbe_get_ethtool_fdir_entry(struct ixgbe_adapter *adapter,
		struct ethtool_rxnfc *cmd)
		{
		@@ -2744,16 +2568,8 @@ static const struct ethtool_ops ixgbe_ethtool_ops = {
		.set_ringparam = ixgbe_set_ringparam,
		.get_pauseparam = ixgbe_get_pauseparam,
		.set_pauseparam = ixgbe_set_pauseparam,
		.get_rx_csum = ixgbe_get_rx_csum,
		.set_rx_csum = ixgbe_set_rx_csum,
		.get_tx_csum = ixgbe_get_tx_csum,
		.set_tx_csum = ixgbe_set_tx_csum,
		.get_sg = ethtool_op_get_sg,
		.set_sg = ethtool_op_set_sg,
		.get_msglevel = ixgbe_get_msglevel,
		.set_msglevel = ixgbe_set_msglevel,
		.get_tso = ethtool_op_get_tso,
		.set_tso = ixgbe_set_tso,
		.self_test = ixgbe_diag_test,
		.get_strings = ixgbe_get_strings,
		.set_phys_id = ixgbe_set_phys_id,
		@@ -2761,8 +2577,6 @@ static const struct ethtool_ops ixgbe_ethtool_ops = {
		.get_ethtool_stats = ixgbe_get_ethtool_stats,
		.get_coalesce = ixgbe_get_coalesce,
		.set_coalesce = ixgbe_set_coalesce,
		.get_flags = ethtool_op_get_flags,
		.set_flags = ixgbe_set_flags,
		.get_rxnfc = ixgbe_get_rxnfc,
		.set_rxnfc = ixgbe_set_rxnfc,
		};