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Commit 979a9afe authored by Ralf Ramsauer's avatar Ralf Ramsauer Committed by Mark Brown
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spi: tegra114: correct register name in definition



According to "Tegra K1 Processor Technical Reference Manual" (p. 2448),
bit 20 of SPI_COMMAND1 is called CS_SW_VAL and not CS_SS_VAL.

Signed-off-by: default avatarRalf Ramsauer <ralf.ramsauer@oth-regensburg.de>
Signed-off-by: default avatarMark Brown <broonie@kernel.org>
parent 2bd6bf03
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+3 −3
Original line number Diff line number Diff line
@@ -50,7 +50,7 @@
#define SPI_IDLE_SDA_PULL_LOW			(2 << 18)
#define SPI_IDLE_SDA_PULL_HIGH			(3 << 18)
#define SPI_IDLE_SDA_MASK			(3 << 18)
#define SPI_CS_SS_VAL				(1 << 20)
#define SPI_CS_SW_VAL				(1 << 20)
#define SPI_CS_SW_HW				(1 << 21)
/* SPI_CS_POL_INACTIVE bits are default high */
						/* n from 0 to 3 */
@@ -705,9 +705,9 @@ static u32 tegra_spi_setup_transfer_one(struct spi_device *spi,

		command1 |= SPI_CS_SW_HW;
		if (spi->mode & SPI_CS_HIGH)
			command1 |= SPI_CS_SS_VAL;
			command1 |= SPI_CS_SW_VAL;
		else
			command1 &= ~SPI_CS_SS_VAL;
			command1 &= ~SPI_CS_SW_VAL;

		tegra_spi_writel(tspi, 0, SPI_COMMAND2);
	} else {